--- a/dac.pio	Sun Feb 16 14:36:33 2025 +1030
+++ b/dac.pio	Fri Feb 21 17:27:22 2025 +1030
@@ -1,14 +1,24 @@
 ;
-; Copyright (c) 2021 Daniel O'Connor
+; Copyright (c) 2025 Daniel O'Connor
 ;
 
 .program dac
+.define TRIGGER_IRQ 0
+; Need 1 side set pin, the clock
+.side_set 1
+; Force load at address 0 so DMA handler can force a jump
+; presumably we could calculate the address but this is easier.
+.origin 0
 
-.side_set 1
+; Clock in a 0 byte
+;    mov pins, null side 0
+;    nop side 1
+; Wait for start trigger
+;    wait 1 irq TRIGGER_IRQ side 0
 ; Clock DAC and write data from the FIFO
-
+; DAC clocks data in on the rising clock edge
+; Autopull is enabled so no need to pull
 .wrap_target
-    pull side 1
     out pins 8 side 0
     nop side 1
     out pins 8 side 0
@@ -16,6 +26,7 @@
     out pins 8 side 0
     nop side 1
     out pins 8 side 0
+    nop side 1
 .wrap
 
 % c-sdk {
@@ -34,12 +45,12 @@
     sm_config_set_out_shift(
         &c,
         true,  // Shift-to-right
-        false, // Autopull enabled
+        true,  // Autopull enabled
         32     // Autopull threshold (bits!)
     );
 
-    // Configure clock as sideset pin
-    sm_config_set_sideset_pins(&c, pin + 7);
+    // Configure sideset pin to use for clock
+    sm_config_set_sideset_pins(&c, pin + 8);
 
     // We only send, so disable the RX FIFO to make the TX FIFO deeper.
     sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);