comparison dac.pio @ 18:f1e44afb41a3

WIP with control and DAC in sync and not hanging. Control data is wrong but baby steps.
author Daniel O'Connor <darius@dons.net.au>
date Tue, 25 Feb 2025 14:36:10 +1030
parents 98880b18bcc1
children 9ad0dd5c638c
comparison
equal deleted inserted replaced
17:a249e4727b01 18:f1e44afb41a3
9 9
10 ; Clock in a 0 byte 10 ; Clock in a 0 byte
11 mov pins, null side 0 11 mov pins, null side 0
12 nop side 1 12 nop side 1
13 ; Wait for start trigger and clear IRQ 13 ; Wait for start trigger and clear IRQ
14 wait 1 irq TRIGGER_IRQ side 0 14 wait 1 irq 1 side 0
15 irq clear 1 side 0
15 ; Clock DAC and write data from the FIFO 16 ; Clock DAC and write data from the FIFO
16 ; DAC clocks data in on the rising clock edge 17 ; DAC clocks data in on the rising clock edge
17 ; Autopull is enabled so no need to pull
18 .wrap_target 18 .wrap_target
19 out pins 8 side 0 19 out pins 8 side 0
20 nop side 1 20 nop side 1
21 out pins 8 side 0 21 out pins 8 side 0
22 nop side 1 22 nop side 1