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comparison dac.pio @ 25:6070d2e66b4c
Cascade IRQs from DAC to control so manual & external trigger are the same.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Tue, 25 Feb 2025 16:53:32 +1030 |
parents | 9ad0dd5c638c |
children | e1d8fe3e418a |
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24:c7845db23ab2 | 25:6070d2e66b4c |
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1 ; | 1 ; |
2 ; Copyright (c) 2025 Daniel O'Connor | 2 ; Copyright (c) 2025 Daniel O'Connor |
3 ; | 3 ; |
4 | 4 |
5 .program dac | 5 .program dac |
6 .define TRIGGER_IRQ 0 | 6 .define DAC_IRQ 0 |
7 .define DAC_TRIGGER_IRQ 0 | |
8 .define CTRL_TRIGGER_IRQ 1 | |
7 ; Need 1 side set pin, the clock | 9 ; Need 1 side set pin, the clock |
8 .side_set 1 | 10 .side_set 1 |
9 | 11 |
10 ; Clock in a 0 byte | 12 ; Clock in a 0 byte |
11 mov pins, null side 0 | 13 mov pins, null side 0 |
12 nop side 1 | 14 nop side 1 |
13 ; Wait for start trigger and clear IRQ | 15 ; Wait for start trigger and clear IRQ |
14 wait 1 irq TRIGGER_IRQ side 0 | 16 wait 1 irq DAC_TRIGGER_IRQ side 0 |
17 ; Trigger the control SM | |
18 irq nowait CTRL_TRIGGER_IRQ side 0 | |
15 ; Clock DAC and write data from the FIFO | 19 ; Clock DAC and write data from the FIFO |
16 ; DAC clocks data in on the rising clock edge | 20 ; DAC clocks data in on the rising clock edge |
17 .wrap_target | 21 .wrap_target |
18 out pins 8 side 0 | 22 out pins 8 side 0 |
19 nop side 1 | 23 nop side 1 |