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annotate modulator.c @ 8:0249d0cecac4

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Use interpolator to compute pulse up. Use interpolator to clamp values. Calculate speed. Do memory clear in routine to be more honest about the speed.
author Daniel O'Connor <darius@dons.net.au>
date Sun, 16 Feb 2025 14:36:33 +1030
parents 4ad473648949
children 3acdebd7eec7
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1 /******************************************************************
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2 *******************************************************************
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3 **
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4 ** This is proprietary unpublished source code, property
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5 ** of Genesis Software. Use or disclosure without prior
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6 ** agreement is expressly prohibited.
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7 **
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8 ** Copyright (c) 2021 Genesis Software, all rights reserved.
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9 **
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10 *******************************************************************
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11 ******************************************************************/
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12
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13 /*
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14 ** MODULATOR.C
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15 **
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16 ** Create modulation shape
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17 **
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18 */
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19
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20 #include <stdio.h>
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21 #include <string.h>
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22 #include "bitstring.h"
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23
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24 #pragma GCC diagnostic push
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25 #pragma GCC diagnostic ignored "-Wtype-limits"
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26 #pragma GCC diagnostic ignored "-Wsign-compare"
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27 #include "pico/stdlib.h"
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28 #include "hardware/clocks.h"
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29 #include "hardware/dma.h"
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30 #include "hardware/interp.h"
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31 #include "hardware/irq.h"
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32 #include "hardware/pll.h"
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33 #include "hardware/pio.h"
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34 #include "hardware/pwm.h"
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35 #include "hardware/structs/pll.h"
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36 #include "hardware/structs/clocks.h"
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37 #pragma GCC diagnostic pop
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38
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39 #include "dac.pio.h"
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40
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41 // https://github.com/howerj/q
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42 // Modified to be Q20.12 rather than Q16.16
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43 #include "q/q.h"
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44
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45 #include "shaped-trap.h"
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46
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47 static int dma_chan;
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48 uint8_t pulse_data[65536];
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49 uint8_t pulse_ctrl[65536];
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50
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51 void
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52 dma_handler(void) {
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53 // Clear the interrupt request.
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54 dma_hw->ints0 = 1u << dma_chan;
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55 // Give the channel a new wave table entry to read from, and re-trigger it
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56 //dma_channel_set_read_addr(dma_chan, shaped_trap_dat_start, true);
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57 }
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58
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59 unsigned slice_num = 0;
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60
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61 void
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62 pwm_wrap(void) {
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63 pwm_clear_irq(slice_num);
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64 #if 0
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65 static unsigned state = 0;
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66
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67 gpio_put(PICO_DEFAULT_LED_PIN, state);
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68 state = !state;
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69 #endif
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70
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71 // Trigger another pulse read out
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72 dma_channel_set_read_addr(dma_chan, pulse_data, true);
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73 }
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74
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75 // Calculate pulse shape data
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76 // TODO: predistortion, proper sense, gate, phase, active, T/R switch
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77 // Could encode them as bit stream like data but more compact would be
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78 // (say) a list of counts to toggle pins at
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79 #define SENSE 0x01
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80 #define GATE 0x02
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81 #define PHINV 0x04
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82 #define PACTIVE 0x08
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83
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84 // Need to add pre/postgate/sense/phase counters
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85 unsigned
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86 compute_pulse(uint8_t *data, uint8_t *ctrl, unsigned datalen, uint16_t plen, char *code, uint8_t ncode, const uint8_t *shape, uint8_t shapelen, uint8_t codegap, uint8_t slew1, uint8_t slew2, uint8_t dcofs) {
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87 uint32_t shapesamples, nsamples, idx, bit1startup, bit1stopup;
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88 q_t dcscale, stepsize;
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89 char tmps[20];
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90 interp_config cfg;
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91
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92 if (ncode == 1) {
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93 // Number of samples for half of the pulse
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94 // Do division first so we don't overflow Q16.16
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95 shapesamples = qtoi(qmul(qdiv(qint(plen), qint(100)), qint(shapelen / 2)));
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96 // Number of samples for everything
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97 // XXX: Need the +1 otherwise slew2 is truncated
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98 nsamples = shapesamples * 2 + slew1 + slew2 + 1;
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99 } else {
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100 shapesamples = plen / 2;
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101 nsamples = shapesamples * 2 * ncode + codegap * (ncode - 1) + slew1 + slew2 + 1;
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102 }
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103
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104 // Number of steps per samples in the pulse shape
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105 stepsize = qdiv(qint(shapelen), qint(shapesamples));
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106 qsprint(stepsize, tmps, sizeof(tmps));
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107 printf("shapelen = %d shapesamples = %lu nsamples = %lu stepsize = %s\n", shapelen, shapesamples, nsamples, tmps);
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108
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109 // Check the requested pulse will not overflow given data
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110 if (nsamples > datalen) {
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111 printf("Pulse too long (%ld > %u)\n", nsamples, datalen);
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112 return 0;
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113 }
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114 // Check it is not too short
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115 if (shapesamples < 2) {
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116 printf("Pulse too short (%lu < %d)\n", shapesamples, 2);
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117 return 0;
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118 }
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119 // Or too long (will overflow for loop variable)
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120 if (qtoi(shapesamples) > 65535) {
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121 printf("Shape too long (%u > %d)\n", qtoi(shapesamples), 65535);
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122 return 0;
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123 }
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124
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125 // Setup interp 0 lane 0 to generate index into shape table
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126 // Mask start is 0 because we use 8 bit samples
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127 cfg = interp_default_config();
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128 interp_config_set_shift(&cfg, QBITS);
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129 interp_config_set_mask(&cfg, 0, 32 - QBITS);
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130 interp_config_set_blend(&cfg, true);
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131 interp_set_config(interp0, 0, &cfg);
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132
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133 // Setup interp 0 lane 1 to LERP each sample pair
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134 cfg = interp_default_config();
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135 interp_config_set_shift(&cfg, QBITS - 8);
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136 interp_config_set_signed(&cfg, false);
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137 interp_config_set_cross_input(&cfg, true); // unsigned blending
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138 interp_set_config(interp0, 1, &cfg);
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139
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140 // Setup interp 1 lane 0 to clamp 0-255
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141 cfg = interp_default_config();
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142 interp_config_set_clamp(&cfg, true);
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143 interp_config_set_shift(&cfg, 0);
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144 interp_config_set_mask(&cfg, 0, 8);
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145 interp_config_set_signed(&cfg, false);
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146 interp_set_config(interp1, 0, &cfg);
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147 interp1->base[0] = 0;
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148 interp1->base[1] = 255;
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149
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150 interp0->accum[0] = 0; // Initial offset into shape table
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151 interp0->base[2] = (uintptr_t)shape; // Start of shape table
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152
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153 dcscale = qdiv(qsub(qint(256), qint(dcofs)), qint(255));
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154 qsprint(dcscale, tmps, sizeof(tmps));
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155 printf("dcscale = %s\n", tmps);
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156
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diff changeset
157 memset(pulse_data, 0, sizeof(pulse_data));
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diff changeset
158 memset(pulse_ctrl, 0, sizeof(pulse_ctrl));
5
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parents: 3
diff changeset
159 idx = 0;
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parents: 3
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160
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diff changeset
161 // Up slew
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162 for (uint16_t i = 0; i < slew1; i++) {
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parents: 3
diff changeset
163 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(i)), qint(slew1)));
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parents: 3
diff changeset
164 ctrl[idx] |= PACTIVE;
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parents: 3
diff changeset
165 }
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parents: 3
diff changeset
166 for (uint16_t c = 0; c < ncode; c++) {
7
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
167 if (c == 0)
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
168 bit1startup = idx;
4ad473648949 Copy pulse up in reverse for pulse down.
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parents: 6
diff changeset
169
5
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diff changeset
170 uint ctrltmp = PACTIVE;
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diff changeset
171 if (code[c] == '0')
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diff changeset
172 ctrltmp |= PHINV;
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173
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diff changeset
174 // Pulse up
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
175 if (c == 0) {
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parents: 7
diff changeset
176 interp0->accum[0] = 0; // Initial offset into shape table
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parents: 7
diff changeset
177 interp0->base[2] = (uintptr_t)shape; // Start of shape table
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parents: 7
diff changeset
178 }
5
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parents: 3
diff changeset
179 for (uint16_t i = 0; i < shapesamples; i++) {
8
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diff changeset
180 if (c == 0) {
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parents: 7
diff changeset
181 // Get sample pair
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diff changeset
182 uint8_t *sample_pair = (uint8_t *) interp0->peek[2];
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diff changeset
183 // Ask lane 1 for a LERP, using the lane 0 accumulator
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diff changeset
184 interp0->base[0] = sample_pair[0];
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diff changeset
185 interp0->base[1] = sample_pair[1];
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parents: 7
diff changeset
186 uint8_t peek = interp0->peek[1];
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diff changeset
187 // Apply DC offset scaling & clamp
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188 interp1->accum[0] = dcofs + qtoi(qmul(qint(peek), dcscale));
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189 data[idx++] = interp1->peek[0];
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diff changeset
190 // Update interpolator for next point
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191 interp0->add_raw[0] = stepsize;
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192 } else
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4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
193 // Already done it before, just copy the previous instance
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194 data[idx++] = data[bit1startup + i];
5
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195 ctrl[idx] = ctrltmp;
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196 }
7
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197 if (c == 0)
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198 bit1stopup = idx - 1;
5
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199 // Pulse down
7
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diff changeset
200 // Since the pulse is symmetrical just copy the up slope in reverse
8
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201 // XXX: if we had asymmetrical predistortion this wouldn't be true
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diff changeset
202 // In that case probably best to do a single pulse up/down, then
0249d0cecac4 Use interpolator to compute pulse up.
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203 // add predistortion and copy it to other bits
5
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diff changeset
204 for (uint16_t i = 0; i < shapesamples; i++) {
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diff changeset
205 data[idx++] = data[bit1stopup - i];
5
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diff changeset
206 // Could replace this with a separate loop to poke it into place
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207 // Similarly for TR switch when implemented
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208 if (i == 0 && c == 0)
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209 ctrl[idx] = ctrltmp | SENSE;
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210 else
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211 ctrl[idx] = ctrltmp;
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diff changeset
212 }
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diff changeset
213
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diff changeset
214 // Code gap
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diff changeset
215 if (c < ncode - 1)
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diff changeset
216 for (uint16_t i = 0; i < codegap; i++) {
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diff changeset
217 data[idx++] = dcofs;
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diff changeset
218 ctrl[idx] = ctrltmp;
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diff changeset
219 }
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diff changeset
220 }
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diff changeset
221
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diff changeset
222 // Down slew
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
223 for (uint16_t i = 0; i < slew2 + 1; i++) {
5
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diff changeset
224 data[idx++] = qtoi(qdiv(qmul(qint(dcofs), qint(slew2 - i)), qint(slew2)));
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diff changeset
225 ctrl[idx] |= PACTIVE;
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diff changeset
226 }
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diff changeset
227 return idx - 1;
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diff changeset
228 }
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diff changeset
229
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diff changeset
230 // As per hello_interp.c
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diff changeset
231 void interp_test(uint8_t *data, const uint8_t *shape) {
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232 interp_config cfg;
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233 const int uv_fractional_bits = 12;
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234
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diff changeset
235 // Step size is 0.25 (ie stretching by 4x)
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236 unsigned step = (1 << uv_fractional_bits) / 4;
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237
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diff changeset
238 puts("interp_test\n");
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diff changeset
239 // Setup lane 0 to generate index into shape table
6
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diff changeset
240 // Mask start is 0 because we use 8 bit samples
5
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diff changeset
241 cfg = interp_default_config();
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242 interp_config_set_shift(&cfg, uv_fractional_bits);
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diff changeset
243 interp_config_set_mask(&cfg, 0, 32 - uv_fractional_bits);
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diff changeset
244 interp_config_set_blend(&cfg, true);
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diff changeset
245 interp_set_config(interp0, 0, &cfg);
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diff changeset
246
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diff changeset
247 // Setup lane 1 to LERP each sample pair
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diff changeset
248 cfg = interp_default_config();
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diff changeset
249 interp_config_set_shift(&cfg, uv_fractional_bits - 8);
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diff changeset
250 interp_config_set_signed(&cfg, false);
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diff changeset
251 interp_config_set_cross_input(&cfg, true); // unsigned blending
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diff changeset
252 interp_set_config(interp0, 1, &cfg);
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diff changeset
253
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diff changeset
254 interp0->accum[0] = 0; // Initial offset into shape table
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diff changeset
255 interp0->base[2] = (uintptr_t)shape; // Start of shape table
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diff changeset
256 for (unsigned i = 0; i < 122 * 4; i++) {
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diff changeset
257 // Get sample pair
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diff changeset
258 uint8_t *sample_pair = (uint8_t *) interp0->peek[2];
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diff changeset
259 // Ask lane 1 for a LERP, using the lane 0 accumulator
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diff changeset
260 interp0->base[0] = sample_pair[0];
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diff changeset
261 interp0->base[1] = sample_pair[1];
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diff changeset
262 uint32_t peek1 = interp0->peek[1];
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diff changeset
263 uint32_t add_raw1 = interp0->add_raw[1];
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diff changeset
264 data[i] = peek1;
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diff changeset
265 printf("%d\t(%lu%% between %d and %d) %lu\n",
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diff changeset
266 (int)peek1,
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diff changeset
267 100 * (add_raw1 & 0xff) / 0xff,
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diff changeset
268 sample_pair[0], sample_pair[1],
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diff changeset
269 interp_get_accumulator(interp0, 0));
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diff changeset
270 interp0->add_raw[0] = step;
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diff changeset
271 }
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diff changeset
272 puts("done");
3
b10097c3383d DMA test data repeatedly into PIO FIFO
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diff changeset
273 }
0
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
274
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
275 int
3
b10097c3383d DMA test data repeatedly into PIO FIFO
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diff changeset
276 main(void) {
5
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diff changeset
277 absolute_time_t then, now;
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parents: 3
diff changeset
278
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diff changeset
279 // Set sysclk to 120MHz
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diff changeset
280 set_sys_clock_khz(120000, true);
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a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
281
a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
282 stdio_init_all();
5
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parents: 3
diff changeset
283 printf("\n\n\nIniting\n");
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a55e39064a71 First commit of code that compiles.
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parents:
diff changeset
284
5
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diff changeset
285 // Needed otherwise timer related functions hang under debugging
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parents: 3
diff changeset
286 // https://github.com/raspberrypi/pico-sdk/issues/1152#issuecomment-1418248639
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diff changeset
287 timer_hw->dbgpause = 0;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
288
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diff changeset
289 gpio_init(PICO_DEFAULT_LED_PIN);
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parents: 3
diff changeset
290 gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
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parents: 3
diff changeset
291
7
4ad473648949 Copy pulse up in reverse for pulse down.
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diff changeset
292 //interp_test(pulse_data, shaped_trap);
5
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parents: 3
diff changeset
293
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parents: 3
diff changeset
294 uint32_t idx;
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
295 uint16_t plen;
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
296 char *code;
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
297 if (0) {
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
298 plen = 8000;
0249d0cecac4 Use interpolator to compute pulse up.
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diff changeset
299 code = "1110010";
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
300 } else {
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
301 plen = 53000;
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
302 code = "1";
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
303 }
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
304
5
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parents: 3
diff changeset
305 uint8_t codegap = 4;
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parents: 3
diff changeset
306 uint8_t slew1 = 10;
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parents: 3
diff changeset
307 uint8_t slew2 = 10;
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parents: 3
diff changeset
308 uint8_t dcofs = 110;
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parents: 3
diff changeset
309 then = get_absolute_time();
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diff changeset
310 if ((idx = compute_pulse(pulse_data, pulse_ctrl, sizeof(pulse_data),
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parents: 3
diff changeset
311 plen, code, strlen(code),
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parents: 3
diff changeset
312 shaped_trap, sizeof(shaped_trap),
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parents: 3
diff changeset
313 codegap, slew1, slew2, dcofs)) == 0) {
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parents: 3
diff changeset
314 printf("Failed to compute pulse\n");
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parents: 3
diff changeset
315 while (1)
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parents: 3
diff changeset
316 ;
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
317 }
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parents: 3
diff changeset
318 now = get_absolute_time();
8
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
319 unsigned long long diff = absolute_time_diff_us(then, now);
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
320 printf("Pulse computation took %lld usec and created %lu samples - %.1f nsec/sample\n",
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
321 diff, idx, (float)diff * 1000.0 / idx);
0249d0cecac4 Use interpolator to compute pulse up.
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parents: 7
diff changeset
322 __breakpoint();
5
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parents: 3
diff changeset
323 pwm_config c = pwm_get_default_config();
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parents: 3
diff changeset
324 // 120MHz / 250 = 480kHz base
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parents: 3
diff changeset
325 // Maximum divisor is only 256 which limits the low end,
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parents: 3
diff changeset
326 // could further subdivide in the IRQ handler
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parents: 3
diff changeset
327 pwm_config_set_clkdiv_int(&c, 250);
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parents: 3
diff changeset
328 // 8Hz
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parents: 3
diff changeset
329 pwm_config_set_wrap(&c, 60000 - 1);
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parents: 3
diff changeset
330 pwm_init(slice_num, &c, true);
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parents: 3
diff changeset
331 pwm_clear_irq(slice_num);
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parents: 3
diff changeset
332 pwm_set_irq_enabled(slice_num, true);
Daniel O'Connor <darius@dons.net.au>
parents: 3
diff changeset
333 irq_set_exclusive_handler(PWM_IRQ_WRAP, pwm_wrap);
Daniel O'Connor <darius@dons.net.au>
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334 irq_set_enabled(PWM_IRQ_WRAP, true);
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335 pwm_init(slice_num, &c, true);
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336
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337 // Load the clocked_input program, and configure a free state machine
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338 // to run the program.
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339 PIO pio = pio0;
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340 uint offset = pio_add_program(pio, &dac_program);
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341 uint sm = pio_claim_unused_sm(pio, true);
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342 // XXX: I would prefer starting at GPIO16 but in that case the top 2
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343 // bits don't seem to work
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344 // Clock divisor of 2 so it runs at 60MHz and
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345 // generates a 30MHz clock
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346 dac_program_init(pio, sm, offset, 14, 2);
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347
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348 // Configure a channel to write the same word (8 bits) repeatedly to PIO0
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349 // SM0's TX FIFO, paced by the data request signal from that peripheral.
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350 dma_chan = dma_claim_unused_channel(true);
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351 dma_channel_config dmac = dma_channel_get_default_config(dma_chan);
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352 // XXX: need to get pulse generator to pad to 32 bits
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353 channel_config_set_transfer_data_size(&dmac, DMA_SIZE_32);
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354 channel_config_set_read_increment(&dmac, true);
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355 channel_config_set_dreq(&dmac, DREQ_PIO0_TX0);
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356
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357 dma_channel_configure(
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358 dma_chan,
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359 &dmac,
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360 &pio0_hw->txf[0], // Write address (only need to set this once)
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361 NULL, // Don't provide a read address yet
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362 idx >> 2, // Transfer count
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363 false // Don't start yet
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364 );
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365
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366 // Tell the DMA to raise IRQ line 0 when the channel finishes a block
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367 dma_channel_set_irq0_enabled(dma_chan, true);
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368
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369 // Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
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370 irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
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371 irq_set_enabled(DMA_IRQ_0, true);
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372
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373 // Everything else from this point is interrupt-driven. The processor has
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374 // time to sit and think about its early retirement -- maybe open a bakery?
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375 while (true) {
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376 dma_channel_wait_for_finish_blocking(dma_chan);
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377 gpio_put(PICO_DEFAULT_LED_PIN, 1);
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378 sleep_ms(100);
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379 gpio_put(PICO_DEFAULT_LED_PIN, 0);
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380 sleep_ms(100);
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381 }
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382
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383 __breakpoint();
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384 }