Mercurial > ~darius > hgwebdir.cgi > memec-test
comparison fifo_top.v @ 1:f88da01700da GSOFT-MEMEC-1-REL
Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
Uses a FIFO and flashes some LEDs.
| author | darius |
|---|---|
| date | Fri, 24 Feb 2006 14:01:25 +0000 |
| parents | |
| children |
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| 0:7390b436dd20 | 1:f88da01700da |
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| 1 `timescale 1ns / 1ps | |
| 2 ////////////////////////////////////////////////////////////////////////////////// | |
| 3 // Company: | |
| 4 // Engineer: | |
| 5 // | |
| 6 // Create Date: 18:33:04 02/21/2006 | |
| 7 // Design Name: | |
| 8 // Module Name: fifo_top | |
| 9 // Project Name: | |
| 10 // Target Devices: | |
| 11 // Tool versions: | |
| 12 // Description: | |
| 13 // | |
| 14 // Dependencies: | |
| 15 // | |
| 16 // Revision: | |
| 17 // Revision 0.01 - File Created | |
| 18 // Additional Comments: | |
| 19 // | |
| 20 ////////////////////////////////////////////////////////////////////////////////// | |
| 21 module fifo_top(din, wr_en, wr_clk, rd_en, rd_clk, ainit, dout, full, empty); | |
| 22 input [3:0] din; | |
| 23 input wr_en; | |
| 24 input wr_clk; | |
| 25 input rd_en; | |
| 26 input rd_clk; | |
| 27 input ainit; | |
| 28 | |
| 29 output [3:0] dout; | |
| 30 output full; | |
| 31 output empty; | |
| 32 | |
| 33 fifo FIFO ( | |
| 34 .din(din), | |
| 35 .wr_en(wr_en), | |
| 36 .wr_clk(wr_clk), | |
| 37 .rd_en(rd_en), | |
| 38 .rd_clk(rd_clk), | |
| 39 .ainit(ainit), | |
| 40 .dout(dout), | |
| 41 .full(full), | |
| 42 .empty(empty) | |
| 43 ); | |
| 44 | |
| 45 endmodule |