annotate test.v @ 3:65ee845bf08c default tip

Initial import of test project for Memec 3SxLC board with Xilinx XC3S400. Uses a FIFO and flashes some LEDs.
author darius
date Fri, 24 Feb 2006 14:01:26 +0000
parents f88da01700da
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
1 `timescale 1ns / 1ps
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
2 //////////////////////////////////////////////////////////////////////////////////
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
3 // Company:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
4 // Engineer:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
5 //
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
6 // Create Date: 14:00:14 02/18/2006
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
7 // Design Name:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
8 // Module Name: test
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
9 // Project Name:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
10 // Target Devices:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
11 // Tool versions:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
12 // Description:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
13 //
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
14 // Dependencies:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
15 //
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
16 // Revision:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
17 // Revision 0.01 - File Created
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
18 // Additional Comments:
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
19 //
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
20 //////////////////////////////////////////////////////////////////////////////////
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
21 module test(CLK, PUSH, DIP, DISPLAY, LED, FIFO_DIN, FIFO_DOUT, FIFO_RDCLK, FIFO_RDEN, FIFO_WRCLK, FIFO_WREN, FIFO_RESET, FIFO_FULL, FIFO_EMPTY);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
22
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
23 // Input Declarations
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
24 input CLK; //surface-mount 50MHz oscillator
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
25 input [2:1] PUSH; //push-button switches
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
26 input [3:0] DIP; //DIP[3] is SW3[1] on the board
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
27 input [3:0] FIFO_DOUT;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
28 input FIFO_FULL;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
29 input FIFO_EMPTY;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
30
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
31 // Output Declarations
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
32 output [6:0] DISPLAY; //7-segment display DD1
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
33 output [3:0] LED; //user LEDs
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
34 output [3:0] FIFO_DIN;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
35 output FIFO_RDCLK;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
36 output FIFO_RDEN;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
37 output FIFO_WRCLK;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
38 output FIFO_WREN;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
39 output FIFO_RESET;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
40
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
41 // Input Registers
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
42 reg [3:0] DIP_r [3:0]; // 4x4 array to hold registered versions of DIP
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
43 reg [3:0] DIP_d; // debounced DIP
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
44 reg [3:0] PUSH1_r; // registered version of PUSH1
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
45 reg [3:0] PUSH2_r; // registered version of PUSH2
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
46 reg PUSH1_d; // debounced PUSH1
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
47 reg PUSH2_d; // debounced PUSH2
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
48
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
49 // Output Registers
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
50 reg [3:0] LED;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
51 reg [6:0] DISPLAY;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
52 reg FIFO_WREN;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
53 reg FIFO_WRCLK;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
54 reg FIFO_RDEN;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
55 reg FIFO_RDCLK;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
56 reg [3:0] FIFO_DIN;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
57 reg FIFO_RESET;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
58
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
59 // Other Registers
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
60 reg [22:0] sec_cnt; // Count clocks for sec_en
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
61 reg reset; // high-asserted reset
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
62 reg ledtog;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
63 reg direction;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
64
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
65 // Internal signals
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
66 wire sec_en; // Asserted on the second
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
67 integer i;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
68
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
69 // Register and debounce push buttons and switches
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
70 // If the bouncy signal is high, 4 consecutive lows required to pull it low
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
71 // If the bouncy signal is low, 4 consecutive highs required to pull it high
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
72 always @(posedge CLK) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
73 PUSH1_r[0] <= PUSH[1];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
74 PUSH1_r[1] <= PUSH1_r[0];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
75 PUSH1_r[2] <= PUSH1_r[1];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
76 PUSH1_r[3] <= PUSH1_r[2];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
77 if(PUSH1_d)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
78 PUSH1_d <= |PUSH1_r;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
79 else
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
80 PUSH1_d <= &PUSH1_r;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
81
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
82 reset <= ~PUSH1_d;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
83
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
84 PUSH2_r[0] <= PUSH[2];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
85 PUSH2_r[1] <= PUSH2_r[0];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
86 PUSH2_r[2] <= PUSH2_r[1];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
87 PUSH2_r[3] <= PUSH2_r[2];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
88 if(PUSH2_d)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
89 PUSH2_d <= |PUSH2_r;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
90 else
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
91 PUSH2_d <= &PUSH2_r;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
92
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
93 // Register the 4-bit DIP switch 4 times
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
94 DIP_r[0] <= DIP;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
95 DIP_r[1] <= DIP_r[0];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
96 DIP_r[2] <= DIP_r[1];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
97 DIP_r[3] <= DIP_r[2];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
98
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
99 // Debounce the DIPs based on the register contents
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
100 // For each bit, 0 through 3, switch polarity only when 4 opposite
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
101 // polarity is seen for four consecutive clocks.
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
102 for (i = 0; i < 4; i = i+1)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
103 begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
104 if(DIP_d[i])
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
105 DIP_d[i] <= DIP_r[0][i] | DIP_r[1][i] | DIP_r[2][i] | DIP_r[3][i];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
106 else
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
107 DIP_d[i] <= DIP_r[0][i] & DIP_r[1][i] & DIP_r[2][i] & DIP_r[3][i];
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
108 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
109
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
110 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
111
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
112
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
113 // Show FIFO status on LEDs
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
114 always @(posedge CLK) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
115 if (reset) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
116 LED <= 4'b0111;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
117 DISPLAY <= 7'b1111111;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
118 end else begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
119 // LED <= (ledtog | (FIFO_EMPTY << 1) | (FIFO_FULL << 2) | (PUSH2_d << 3));
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
120 LED <= {PUSH2_d, ~FIFO_FULL, ~FIFO_EMPTY, ledtog};
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
121
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
122 if (PUSH2_d)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
123 DISPLAY <= NUM2SEG(~DIP_d);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
124 else
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
125 DISPLAY <= NUM2SEG(FIFO_DOUT);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
126 end // else: !if(reset)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
127 end // always @ (posedge CLK)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
128
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
129 always @(posedge CLK or negedge CLK) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
130 if (CLK) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
131 FIFO_WRCLK <= 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
132 FIFO_RDCLK <= 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
133 end else begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
134 FIFO_WRCLK <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
135 FIFO_RDCLK <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
136 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
137 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
138
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
139 // Count 3.125Mhz clocks to drive the second tick
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
140 always @(posedge CLK) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
141 if (reset) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
142 ledtog <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
143 sec_cnt <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
144 FIFO_DIN <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
145 FIFO_WREN <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
146 FIFO_RDEN <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
147 FIFO_RESET <= 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
148 direction <= 0; // Write
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
149 end else begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
150 FIFO_RESET <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
151 // Drive FIFO input from debounced DIP switches
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
152 FIFO_DIN <= ~(DIP_d);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
153
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
154 // Hit the second mark?
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
155 if (sec_en) begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
156 sec_cnt <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
157
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
158 // FIFO
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
159 if (FIFO_FULL)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
160 direction <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
161
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
162 if (FIFO_EMPTY)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
163 direction <= 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
164
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
165 if (direction)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
166 FIFO_WREN <= 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
167 else
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
168 FIFO_RDEN <= 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
169
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
170 ledtog <= ~ledtog;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
171 end else begin // sec_en
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
172 sec_cnt <= sec_cnt + 1;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
173 FIFO_WREN <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
174 FIFO_RDEN <= 0;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
175 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
176 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
177 end // always @ (posedge CLK)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
178
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
179 // Create 1-second count
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
180 assign sec_en = (sec_cnt == 22'd3_125_000);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
181
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
182 // Convert a number into hex for the 7 segment display
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
183 function [6:0] NUM2SEG;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
184 input [3:0] num;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
185 begin
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
186 case (num)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
187 0: NUM2SEG = ~(7'b0111111);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
188 1: NUM2SEG = ~(7'b0000110);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
189 2: NUM2SEG = ~(7'b1011011);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
190 3: NUM2SEG = ~(7'b1001111);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
191 4: NUM2SEG = ~(7'b1100110);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
192 5: NUM2SEG = ~(7'b1101101);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
193 6: NUM2SEG = ~(7'b1111101);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
194 7: NUM2SEG = ~(7'b0000111);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
195 8: NUM2SEG = ~(7'b1111111);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
196 9: NUM2SEG = ~(7'b1101111);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
197 4'hA: NUM2SEG = ~(7'b1110111);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
198 4'hb: NUM2SEG = ~(7'b1111100);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
199 4'hC: NUM2SEG = ~(7'b0111001);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
200 4'hd: NUM2SEG = ~(7'b1011110);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
201 4'hE: NUM2SEG = ~(7'b1111001);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
202 4'hF: NUM2SEG = ~(7'b1110001);
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
203 default: NUM2SEG = 7'b1111111;
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
204 endcase // case(~num)
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
205 end
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
206 endfunction
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
207
f88da01700da Initial import of test project for Memec 3SxLC board with Xilinx XC3S400.
darius
parents:
diff changeset
208 endmodule