Mercurial > ~darius > hgwebdir.cgi > avr

changeset 35:fed32b382de2

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Tidy up, hide details behind macros to make it more obvious what we talk to do do things. Convert constants to my preferred format.
author darius
date Tue, 23 Oct 2007 10:54:01 +0930
parents 2b8278ec5adb
children e40e919721b0
files usb.c usb.h
diffstat 2 files changed, 85 insertions(+), 61 deletions(-) [+]
line wrap: on
line diff
--- a/usb.c	Tue Oct 23 10:52:50 2007 +0930
+++ b/usb.c	Tue Oct 23 10:54:01 2007 +0930
@@ -170,19 +170,6 @@
     "1\02\03\0"
 };
 
-/*
- * The PDIUSBD12 is wired up like so
- *
- *  PDI		     AVR	
- * ======================
- * D7:0     <=>     PA7:0	   
- * INT_N     =>     PB0
- * RD_N     <=      PB1
- * WR_N     <=      PB2
- * A0       <=      PB3 (0 = data, 1 = cmd)
- * SUSPEND  <=>     PB4
- */
-
 /*******************************************************************************
 ** d12_get_data
 **
@@ -193,14 +180,14 @@
     uint8_t data;
 
     _delay_us(1);
-    PORTB &= ~_BV(PB3);	/* Data phase */
-    DDRA = 0x00;	/* Set to input */
-    PORTB &= ~_BV(PB1);	/* Pull RD_N low */
-    PORTB &= ~_BV(PB1);	/* Delay 40ns */
-    PORTB &= ~_BV(PB1);
-    PORTB &= ~_BV(PB1);
-    data = PINA;	/* Read the data */
-    PORTB |= _BV(PB1);	/* Pull RD_N high */
+    PDICTL &= ~_BV(PDIA0);	/* Data phase */
+    PDIDDR = 0x00;		/* Set to input */
+    PDICTL &= ~_BV(PDIRD);	/* Pull RD_N low */
+    PDICTL &= ~_BV(PDIRD);	/* Delay 40ns */
+    PDICTL &= ~_BV(PDIRD);
+    PDICTL &= ~_BV(PDIRD);
+    data = PINA;		/* Read the data */
+    PDICTL |= _BV(PDIRD);	/* Pull RD_N high */
 
     return(data);
 }
@@ -213,18 +200,18 @@
 void
 d12_set_data(uint8_t data) {
     _delay_us(1);
-    PORTB &= ~_BV(PB3);	/* Data phase */
-    DDRA = 0xff;	/* Set to output */
-    PORTA = data;	/* Put the data on the bus */
-    PORTB &= ~_BV(PB2);	/* Pull WR_N low */
-    PORTB &= ~_BV(PB2);	/* Delay 40ns */
-    PORTB &= ~_BV(PB2);
-    PORTB &= ~_BV(PB2);
-    PORTB |= _BV(PB2);	/* Pull WR_N high */
-    PORTB |= _BV(PB2);	/* Delay 40 ns */
-    PORTB |= _BV(PB2);	 
-    PORTB |= _BV(PB2);	 
-    DDRA = 0x00;	/* Back to input */
+    PDICTL &= ~_BV(PDIA0);	/* Data phase */
+    PDIDDR = 0xff;		/* Set to output */
+    PDIPORT = data;		/* Put the data on the bus */
+    PDICTL &= ~_BV(PDIWR);	/* Pull WR_N low */
+    PDICTL &= ~_BV(PDIWR);	/* Delay 40ns */
+    PDICTL &= ~_BV(PDIWR);
+    PDICTL &= ~_BV(PDIWR);
+    PDICTL |= _BV(PDIWR);	/* Pull WR_N high */
+    PDICTL |= _BV(PDIWR);	/* Delay 40 ns */
+    PDICTL |= _BV(PDIWR);	 
+    PDICTL |= _BV(PDIWR);	 
+    PDIDDR = 0x00;		/* Back to input */
 }
 
 /*******************************************************************************
@@ -235,18 +222,18 @@
 void
 d12_set_cmd(uint8_t cmd) {
     _delay_us(1);
-    PORTB |= _BV(PB3);	/* Command phase */
-    DDRA = 0xff;	/* Set to output */
-    PORTA = cmd;	/* Put the data on the bus */
-    PORTB &= ~_BV(PB2);	/* Pull WR_N low */
-    PORTB &= ~_BV(PB2);	/* Delay 40ns */
-    PORTB &= ~_BV(PB2);
-    PORTB &= ~_BV(PB2);
-    PORTB |= _BV(PB2);	/* Pull WR_N high */
-    PORTB |= _BV(PB2);	/* Delay 40ns */
-    PORTB |= _BV(PB2);
-    PORTB |= _BV(PB2);
-    DDRA = 0x00;	/* Back to input */
+    PDICTL |= _BV(PDIA0);	/* Command phase */
+    PDIDDR = 0xff;		/* Set to output */
+    PDIPORT = cmd;		/* Put the data on the bus */
+    PDICTL &= ~_BV(PDIWR);	/* Pull WR_N low */
+    PDICTL &= ~_BV(PDIWR);	/* Delay 40ns */
+    PDICTL &= ~_BV(PDIWR);
+    PDICTL &= ~_BV(PDIWR);
+    PDICTL |= _BV(PDIWR);	/* Pull WR_N high */
+    PDICTL |= _BV(PDIWR);	/* Delay 40ns */
+    PDICTL |= _BV(PDIWR);
+    PDICTL |= _BV(PDIWR);
+    PDIDDR = 0x00;		/* Back to input */
 }
 
 /*******************************************************************************
@@ -292,6 +279,16 @@
 usb_init(void) {
     uint8_t	buffer[2];
     
+    /* Check the device is present */
+    d12_read_cmd(D12_READ_CHIP_ID, buffer, 2);
+    if (buffer[0] != 0x12 || buffer[1] != 0x10) {
+	uart_putsP(PSTR("PDIUSBD12 does not appear to be present/working, chip ID = 0x"));
+	uart_puts_hex(buffer[0]);
+	uart_puts_hex(buffer[1]);
+	uart_putsP(PSTR(", expected 0x1210\n\r"));
+	return;
+    }
+    
     /* pull EE_Serial_Descriptor into RAM */
     eeprom_read_block(&Serial_Descriptor, &EE_Serial_Descriptor, EE_Serial_Descriptor.bLength);
 
@@ -317,6 +314,7 @@
     /* Endpoint 2 IN/OUT IRQ enable */
     buffer[0] = 0xc0;
     d12_write_cmd(D12_SET_DMA, buffer, 1);
+
 }
 
 /*******************************************************************************
@@ -329,11 +327,13 @@
     uint8_t	irq[2];
     uint8_t	buffer[8];
     
-    d12_read_cmd(D12_READ_INTERRUPT_REGISTER, (uint8_t *)&irq, 2);
+    d12_read_cmd(D12_READ_INTERRUPT_REGISTER, irq, 2);
 
     /* Why do we get interrupts when this is 0? */
     if (irq[0] == 0)
 	return;
+
+    uart_putsP(PSTR("usb_intr() called\n\r"));
     
     if (irq[0] & D12_INT_BUS_RESET) {
 	uart_putsP(PSTR("Bus reset\n\r"));
@@ -703,7 +703,7 @@
 ** Reset the micro by triggering the watchdog timer.
 **
 */
-static void
+void
 reset(void) {
     uart_putsP(PSTR("Resetting!\n\r"));
     _delay_us(1000);
@@ -1017,13 +1017,13 @@
     switch (buffer[0]) {
 	case 0x00:
 	    uart_putsP(PSTR("OWTouchReset()\n\r"));
-	    (int8_t)buffer[0] = OWTouchReset();
+	    buffer[0] = OWTouchReset();
 	    d12_write_endpt(ep, buffer, 1);
 	    break;
 		
 	case 0x01:
 	    uart_putsP(PSTR("OWFirst()\n\r"));
-	    (int8_t)buffer[0] = OWFirst(&buffer[1], 1, 0);
+	    buffer[0] = OWFirst(&buffer[1], 1, 0);
 	    for (i = 0; i < 9; i++) {
 		uart_puts_hex(buffer[i + 1]);
 		uart_putsP(PSTR(" "));
@@ -1034,7 +1034,7 @@
 
 	case 0x02:
 	    uart_putsP(PSTR("OWNext()\n\r"));
-	    (int8_t)buffer[0] = OWNext(&buffer[1], 1, 0);
+	    buffer[0] = OWNext(&buffer[1], 1, 0);
 	    d12_write_endpt(ep, buffer, 9);
 	    break;
 
--- a/usb.h	Tue Oct 23 10:52:50 2007 +0930
+++ b/usb.h	Tue Oct 23 10:54:01 2007 +0930
@@ -97,19 +97,20 @@
     uint16_t wLANGID0;
 } __attribute__ ((packed))  LANGID_DESCRIPTOR;
 
-#define D12_SET_ADDRESS_ENABLE		0xD0
-#define D12_SET_ENDPOINT_ENABLE  	0xD8
-#define D12_SET_MODE			0xF3
-#define D12_SET_DMA			0xFB
-#define D12_READ_INTERRUPT_REGISTER 	0xF4
-#define D12_READ_BUFFER			0xF0
-#define D12_WRITE_BUFFER		0xF0
-#define D12_ACK_SETUP			0xF1
-#define D12_CLEAR_BUFFER		0xF2
-#define D12_VALIDATE_BUFFER		0xFA
+#define D12_SET_ADDRESS_ENABLE		0xd0
+#define D12_SET_ENDPOINT_ENABLE  	0xd8
+#define D12_SET_MODE			0xf3
+#define D12_SET_DMA			0xfb
+#define D12_READ_INTERRUPT_REGISTER 	0xf4
+#define D12_READ_BUFFER			0xf0
+#define D12_WRITE_BUFFER		0xf0
+#define D12_ACK_SETUP			0xf2
+#define D12_CLEAR_BUFFER		0xf2
+#define D12_VALIDATE_BUFFER		0xfa
 #define D12_READ_LAST_TRANSACTION	0x40
 #define D12_SET_ENDPOINT_STATUS		0x40
 #define D12_READ_ENDPOINT_STATUS	0x80
+#define D12_READ_CHIP_ID		0xfd
 
 #define D12_ENDPOINT_EP0_OUT 		0x00
 #define D12_ENDPOINT_EP0_IN 		0x01
@@ -189,8 +190,31 @@
 void		d12_send_data_ep2(void);
 void		d12_receive_data_ep2(void);
 
-static void	reset(void);
+void 		reset(void);
 
 void		usb_init(void);
 void		usb_intr(void);
 void		usb_gendata(void);
+
+/*
+ * The PDIUSBD12 is wired up like so
+ *
+ *  PDI		     AVR	
+ * ======================
+ * D7:0     <=>     PA7:0	   
+ * RD_N     <=      PB0
+ * INT_N     =>     PB1
+ * WR_N     <=      PB2
+ * A0       <=      PB3 (0 = data, 1 = cmd)
+ * SUSPEND  <=>     PB4
+ */
+
+#define PDIPORT	PORTA
+#define PDIDDR	PORTA
+#define PDICTL	PORTB
+#define PDIRD	PB0
+#define PDIINT	PB1
+#define PDIWR	PB2
+#define PDIA0	PB3
+#define PDISUSP	PB4
+