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comparison usb.c @ 35:fed32b382de2

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Tidy up, hide details behind macros to make it more obvious what we talk to do do things. Convert constants to my preferred format.
author darius
date Tue, 23 Oct 2007 10:54:01 +0930
parents 4e417d84365e
children 5898fba6593c
comparison
equal deleted inserted replaced
34:2b8278ec5adb 35:fed32b382de2
168 sizeof(STRING_DESCRIPTOR) + 20, /* bLength - must match string below */ 168 sizeof(STRING_DESCRIPTOR) + 20, /* bLength - must match string below */
169 TYPE_STRING_DESCRIPTOR, /* bDescriptorType */ 169 TYPE_STRING_DESCRIPTOR, /* bDescriptorType */
170 "1\02\03\0" 170 "1\02\03\0"
171 }; 171 };
172 172
173 /*
174 * The PDIUSBD12 is wired up like so
175 *
176 * PDI AVR
177 * ======================
178 * D7:0 <=> PA7:0
179 * INT_N => PB0
180 * RD_N <= PB1
181 * WR_N <= PB2
182 * A0 <= PB3 (0 = data, 1 = cmd)
183 * SUSPEND <=> PB4
184 */
185
186 /******************************************************************************* 173 /*******************************************************************************
187 ** d12_get_data 174 ** d12_get_data
188 ** 175 **
189 ** Read a data byte 176 ** Read a data byte
190 */ 177 */
191 uint8_t 178 uint8_t
192 d12_get_data(void) { 179 d12_get_data(void) {
193 uint8_t data; 180 uint8_t data;
194 181
195 _delay_us(1); 182 _delay_us(1);
196 PORTB &= ~_BV(PB3); /* Data phase */ 183 PDICTL &= ~_BV(PDIA0); /* Data phase */
197 DDRA = 0x00; /* Set to input */ 184 PDIDDR = 0x00; /* Set to input */
198 PORTB &= ~_BV(PB1); /* Pull RD_N low */ 185 PDICTL &= ~_BV(PDIRD); /* Pull RD_N low */
199 PORTB &= ~_BV(PB1); /* Delay 40ns */ 186 PDICTL &= ~_BV(PDIRD); /* Delay 40ns */
200 PORTB &= ~_BV(PB1); 187 PDICTL &= ~_BV(PDIRD);
201 PORTB &= ~_BV(PB1); 188 PDICTL &= ~_BV(PDIRD);
202 data = PINA; /* Read the data */ 189 data = PINA; /* Read the data */
203 PORTB |= _BV(PB1); /* Pull RD_N high */ 190 PDICTL |= _BV(PDIRD); /* Pull RD_N high */
204 191
205 return(data); 192 return(data);
206 } 193 }
207 194
208 /******************************************************************************* 195 /*******************************************************************************
211 ** Write a data byte 198 ** Write a data byte
212 */ 199 */
213 void 200 void
214 d12_set_data(uint8_t data) { 201 d12_set_data(uint8_t data) {
215 _delay_us(1); 202 _delay_us(1);
216 PORTB &= ~_BV(PB3); /* Data phase */ 203 PDICTL &= ~_BV(PDIA0); /* Data phase */
217 DDRA = 0xff; /* Set to output */ 204 PDIDDR = 0xff; /* Set to output */
218 PORTA = data; /* Put the data on the bus */ 205 PDIPORT = data; /* Put the data on the bus */
219 PORTB &= ~_BV(PB2); /* Pull WR_N low */ 206 PDICTL &= ~_BV(PDIWR); /* Pull WR_N low */
220 PORTB &= ~_BV(PB2); /* Delay 40ns */ 207 PDICTL &= ~_BV(PDIWR); /* Delay 40ns */
221 PORTB &= ~_BV(PB2); 208 PDICTL &= ~_BV(PDIWR);
222 PORTB &= ~_BV(PB2); 209 PDICTL &= ~_BV(PDIWR);
223 PORTB |= _BV(PB2); /* Pull WR_N high */ 210 PDICTL |= _BV(PDIWR); /* Pull WR_N high */
224 PORTB |= _BV(PB2); /* Delay 40 ns */ 211 PDICTL |= _BV(PDIWR); /* Delay 40 ns */
225 PORTB |= _BV(PB2); 212 PDICTL |= _BV(PDIWR);
226 PORTB |= _BV(PB2); 213 PDICTL |= _BV(PDIWR);
227 DDRA = 0x00; /* Back to input */ 214 PDIDDR = 0x00; /* Back to input */
228 } 215 }
229 216
230 /******************************************************************************* 217 /*******************************************************************************
231 ** d12_set_cmd 218 ** d12_set_cmd
232 ** 219 **
233 ** Start a command 220 ** Start a command
234 */ 221 */
235 void 222 void
236 d12_set_cmd(uint8_t cmd) { 223 d12_set_cmd(uint8_t cmd) {
237 _delay_us(1); 224 _delay_us(1);
238 PORTB |= _BV(PB3); /* Command phase */ 225 PDICTL |= _BV(PDIA0); /* Command phase */
239 DDRA = 0xff; /* Set to output */ 226 PDIDDR = 0xff; /* Set to output */
240 PORTA = cmd; /* Put the data on the bus */ 227 PDIPORT = cmd; /* Put the data on the bus */
241 PORTB &= ~_BV(PB2); /* Pull WR_N low */ 228 PDICTL &= ~_BV(PDIWR); /* Pull WR_N low */
242 PORTB &= ~_BV(PB2); /* Delay 40ns */ 229 PDICTL &= ~_BV(PDIWR); /* Delay 40ns */
243 PORTB &= ~_BV(PB2); 230 PDICTL &= ~_BV(PDIWR);
244 PORTB &= ~_BV(PB2); 231 PDICTL &= ~_BV(PDIWR);
245 PORTB |= _BV(PB2); /* Pull WR_N high */ 232 PDICTL |= _BV(PDIWR); /* Pull WR_N high */
246 PORTB |= _BV(PB2); /* Delay 40ns */ 233 PDICTL |= _BV(PDIWR); /* Delay 40ns */
247 PORTB |= _BV(PB2); 234 PDICTL |= _BV(PDIWR);
248 PORTB |= _BV(PB2); 235 PDICTL |= _BV(PDIWR);
249 DDRA = 0x00; /* Back to input */ 236 PDIDDR = 0x00; /* Back to input */
250 } 237 }
251 238
252 /******************************************************************************* 239 /*******************************************************************************
253 ** d12_write_cmd 240 ** d12_write_cmd
254 ** 241 **
289 ** Configure the PDIUSBD12 276 ** Configure the PDIUSBD12
290 */ 277 */
291 void 278 void
292 usb_init(void) { 279 usb_init(void) {
293 uint8_t buffer[2]; 280 uint8_t buffer[2];
281
282 /* Check the device is present */
283 d12_read_cmd(D12_READ_CHIP_ID, buffer, 2);
284 if (buffer[0] != 0x12 || buffer[1] != 0x10) {
285 uart_putsP(PSTR("PDIUSBD12 does not appear to be present/working, chip ID = 0x"));
286 uart_puts_hex(buffer[0]);
287 uart_puts_hex(buffer[1]);
288 uart_putsP(PSTR(", expected 0x1210\n\r"));
289 return;
290 }
294 291
295 /* pull EE_Serial_Descriptor into RAM */ 292 /* pull EE_Serial_Descriptor into RAM */
296 eeprom_read_block(&Serial_Descriptor, &EE_Serial_Descriptor, EE_Serial_Descriptor.bLength); 293 eeprom_read_block(&Serial_Descriptor, &EE_Serial_Descriptor, EE_Serial_Descriptor.bLength);
297 294
298 /* Set Address to zero (default) and enable function */ 295 /* Set Address to zero (default) and enable function */
315 d12_write_cmd(D12_SET_MODE, buffer, 2); 312 d12_write_cmd(D12_SET_MODE, buffer, 2);
316 313
317 /* Endpoint 2 IN/OUT IRQ enable */ 314 /* Endpoint 2 IN/OUT IRQ enable */
318 buffer[0] = 0xc0; 315 buffer[0] = 0xc0;
319 d12_write_cmd(D12_SET_DMA, buffer, 1); 316 d12_write_cmd(D12_SET_DMA, buffer, 1);
317
320 } 318 }
321 319
322 /******************************************************************************* 320 /*******************************************************************************
323 ** usb_intr 321 ** usb_intr
324 ** 322 **
327 void 325 void
328 usb_intr(void) { 326 usb_intr(void) {
329 uint8_t irq[2]; 327 uint8_t irq[2];
330 uint8_t buffer[8]; 328 uint8_t buffer[8];
331 329
332 d12_read_cmd(D12_READ_INTERRUPT_REGISTER, (uint8_t *)&irq, 2); 330 d12_read_cmd(D12_READ_INTERRUPT_REGISTER, irq, 2);
333 331
334 /* Why do we get interrupts when this is 0? */ 332 /* Why do we get interrupts when this is 0? */
335 if (irq[0] == 0) 333 if (irq[0] == 0)
336 return; 334 return;
335
336 uart_putsP(PSTR("usb_intr() called\n\r"));
337 337
338 if (irq[0] & D12_INT_BUS_RESET) { 338 if (irq[0] & D12_INT_BUS_RESET) {
339 uart_putsP(PSTR("Bus reset\n\r")); 339 uart_putsP(PSTR("Bus reset\n\r"));
340 usb_init(); 340 usb_init();
341 return; 341 return;
701 ** reset 701 ** reset
702 ** 702 **
703 ** Reset the micro by triggering the watchdog timer. 703 ** Reset the micro by triggering the watchdog timer.
704 ** 704 **
705 */ 705 */
706 static void 706 void
707 reset(void) { 707 reset(void) {
708 uart_putsP(PSTR("Resetting!\n\r")); 708 uart_putsP(PSTR("Resetting!\n\r"));
709 _delay_us(1000); 709 _delay_us(1000);
710 710
711 /* Disable the interrupts */ 711 /* Disable the interrupts */
1015 int i; 1015 int i;
1016 1016
1017 switch (buffer[0]) { 1017 switch (buffer[0]) {
1018 case 0x00: 1018 case 0x00:
1019 uart_putsP(PSTR("OWTouchReset()\n\r")); 1019 uart_putsP(PSTR("OWTouchReset()\n\r"));
1020 (int8_t)buffer[0] = OWTouchReset(); 1020 buffer[0] = OWTouchReset();
1021 d12_write_endpt(ep, buffer, 1); 1021 d12_write_endpt(ep, buffer, 1);
1022 break; 1022 break;
1023 1023
1024 case 0x01: 1024 case 0x01:
1025 uart_putsP(PSTR("OWFirst()\n\r")); 1025 uart_putsP(PSTR("OWFirst()\n\r"));
1026 (int8_t)buffer[0] = OWFirst(&buffer[1], 1, 0); 1026 buffer[0] = OWFirst(&buffer[1], 1, 0);
1027 for (i = 0; i < 9; i++) { 1027 for (i = 0; i < 9; i++) {
1028 uart_puts_hex(buffer[i + 1]); 1028 uart_puts_hex(buffer[i + 1]);
1029 uart_putsP(PSTR(" ")); 1029 uart_putsP(PSTR(" "));
1030 } 1030 }
1031 uart_putsP(PSTR("\n\r")); 1031 uart_putsP(PSTR("\n\r"));
1032 d12_write_endpt(ep, buffer, 9); 1032 d12_write_endpt(ep, buffer, 9);
1033 break; 1033 break;
1034 1034
1035 case 0x02: 1035 case 0x02:
1036 uart_putsP(PSTR("OWNext()\n\r")); 1036 uart_putsP(PSTR("OWNext()\n\r"));
1037 (int8_t)buffer[0] = OWNext(&buffer[1], 1, 0); 1037 buffer[0] = OWNext(&buffer[1], 1, 0);
1038 d12_write_endpt(ep, buffer, 9); 1038 d12_write_endpt(ep, buffer, 9);
1039 break; 1039 break;
1040 1040
1041 case 0x03: 1041 case 0x03:
1042 uart_putsP(PSTR(" bytes, asked to do temperature conversion for ")); 1042 uart_putsP(PSTR(" bytes, asked to do temperature conversion for "));