annotate testavr.c @ 6:0da70b744078

Clean the right files.
author darius
date Mon, 12 Jul 2004 15:43:31 +0930
parents 81e2f85e02ce
children a940431af6f5
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1 /*
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2 * Copyright (c) 2004
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3 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
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4 *
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5 * Redistribution and use in source and binary forms, with or without
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6 * modification, are permitted provided that the following conditions
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7 * are met:
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8 * 1. Redistributions of source code must retain the above copyright
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9 * notice, this list of conditions and the following disclaimer.
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10 * 2. Redistributions in binary form must reproduce the above copyright
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11 * notice, this list of conditions and the following disclaimer in the
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12 * documentation and/or other materials provided with the distribution.
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13 *
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14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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24 * SUCH DAMAGE.
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25 */
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26
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27 #include <stdio.h>
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28 #include <avr/io.h>
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29 #include <avr/interrupt.h>
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30 #include <avr/signal.h>
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31 #include <avr/pgmspace.h>
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32 #include <string.h>
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33 #include <ctype.h>
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34
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35 #include "1wire.h"
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36
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37 #define UART_BAUD_SELECT(baudRate,xtalCpu) ((xtalCpu)/((baudRate)*16l)-1)
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38 #define XTAL_CPU 4000000 /* 4Mhz */
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39 #define UART_BAUD_RATE 19200
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40
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41 void uart_putsP(const char *addr);
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42 void uart_puts(const char *addr);
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43 int uart_putc(char c);
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44 int uart_getc(void);
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45 int beginswith_P(const char *s1, const char *s2);
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46
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47 #if 0
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48 uint8_t PROGMEM ledvals[] = {0x01, 0x03, 0x07, 0x0e, 0x1c, 0x38, 0x70, 0xe0, 0xc0, 0x80};
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49 static uint8_t dir = 0;
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50 static volatile uint8_t leds = 0;
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51 static uint8_t ledpos = 0;
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52
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53 INTERRUPT(SIG_OVERFLOW0) {
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54 if (!leds)
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55 return;
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56
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57 /* Going up */
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58 if (dir == 0) {
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59 if (ledpos == 9) {
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60 dir = 1;
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61 TCNT0 = 0;
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62 goto doleds;
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63 }
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64
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65 ledpos++;
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66 } else {
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67 if (ledpos == 0) {
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68 dir = 0;
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69 TCNT0 = 0;
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70 goto doleds;
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71 }
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72
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73 ledpos--;
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74 }
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75
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76 doleds:
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77 TCNT0 = 0;
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78
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79 PORTA = pgm_read_byte(&ledvals[ledpos]);
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80 }
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81 #endif
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82
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83 void
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84 usleep(uint16_t usec) {
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85 /* 4Mhz = 250ns per clock cycle */
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86 usec /= 2;
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87 if (usec < 1)
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88 return;
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89
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90 while (usec--)
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91 asm volatile (
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92 ""
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93 ::);
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94 }
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95
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96 int
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97 main(void) {
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98 uint8_t ROM[8];
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99 char cmdbuf[40];
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100 int i;
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101
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102 cli();
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103 #if 0
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104 outp(0xff, DDRA);
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105
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106 /* Timer Clock divisor - CK/1024 */
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107 outp(BV(CS00) | BV(CS02), TCCR0);
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108 #endif
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109 outp(0xfe, DDRC);
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110 outp(0x00, PORTC);
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111
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112 /* Init UART */
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113 outp(UART_BAUD_SELECT(UART_BAUD_RATE,XTAL_CPU), UBRR);
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114
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115 /* Enable receiver and transmitter. Turn on transmit interrupts */
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116 outp(BV(RXEN) | BV(TXEN), UCR);
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117
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118 uart_putsP(PSTR("\n\r\n\r===============\n\r"
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119 "Inited!\n\r\n\r"));
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120
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121 while (1) {
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122 uart_putsP(PSTR("> "));
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123 i = 0;
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124 while (1) {
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125 cmdbuf[i] = tolower(uart_getc());
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126 if (cmdbuf[i] == '\n' || cmdbuf[i] == '\r')
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127 break;
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128
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129 /* Backspace */
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130 if (cmdbuf[i] == 010) {
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131 if (i > 0) {
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132 uart_putsP(PSTR("\010\040\010"));
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133 i--;
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134 }
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135 continue;
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136 }
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137
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138 /* Anything unprintable just ignore it */
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139 if (!isprint(cmdbuf[i]))
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140 continue;
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141
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142 uart_putc(cmdbuf[i]);
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143 i++;
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144 if (i == sizeof(cmdbuf)) {
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145 uart_putsP(PSTR("\n\rLine too long\n\r"));
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146 i = 0;
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147 continue;
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148 }
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149 }
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150 cmdbuf[i + 1] = '\0';
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151 uart_putsP(PSTR("\n\r"));
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152 if (i == 0)
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153 continue;
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154
4
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155 if (cmdbuf[0] == '?') {
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156 uart_putsP(PSTR("rs Reset and check for presence\n\r"
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157 "re Read a bit\n\r"
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158 "rb Read a byte\n\r"
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159 "wr bit Write a bit\n\r"
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160 "wb byte Write a byte (hex)\n\r"
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161 "wc cmd [ROMID] Write command\n\r"
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162 "te ROMID Read the temperature from a DS1820\n\r"));
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163 continue;
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164 }
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165
4
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166 if (i < 2)
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167 goto badcmd;
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168
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169 if (cmdbuf[0] == 'r' && cmdbuf[1] == 's') {
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170 uart_putsP(PSTR("Resetting... "));
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171
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172 if (OWTouchReset() == 1)
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173 uart_putsP(PSTR("No presense\n\r"));
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174 else
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175 uart_putsP(PSTR("Presense\n\r"));
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176 } else if (cmdbuf[0] == 'r' && cmdbuf[1] == 'e') {
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177 if (OWReadBit())
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178 uart_putsP(PSTR("Read a 1\n\r"));
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179 else
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180 uart_putsP(PSTR("Read a 0\n\r"));
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181 } else if (cmdbuf[0] == 'r' && cmdbuf[1] == 'b') {
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182 sprintf_P(cmdbuf, PSTR("Read a 0x%02x\n\r"), OWReadByte());
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183 uart_puts(cmdbuf);
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184 } else if (cmdbuf[0] == 'w' && cmdbuf[1] == 'r') {
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185 int arg;
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186
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187 if (sscanf_P(cmdbuf + 3, PSTR("%d"), &arg) != 1) {
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188 uart_putsP(PSTR("Unable to parse wr command\n\r"));
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189 continue;
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190 }
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191
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192 OWWriteBit(arg);
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193 sprintf_P(cmdbuf, PSTR("Wrote a %d\n\r"), arg);
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194 uart_puts(cmdbuf);
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195 } else if (cmdbuf[0] == 'w' && cmdbuf[1] == 'b') {
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196 int arg;
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197
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198 if (sscanf_P(cmdbuf + 3, PSTR("%2x"), &arg) != 1) {
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199 uart_putsP(PSTR("Unable to parse wb command\n\r"));
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200 continue;
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201 }
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202
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203 OWWriteByte(arg);
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204 sprintf_P(cmdbuf, PSTR("Wrote a 0x%02x\n\r"), arg);
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205 uart_puts(cmdbuf);
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206 } else if (cmdbuf[0] == 'w' && cmdbuf[1] == 'c') {
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207 int arg;
0
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208
4
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209 switch (sscanf_P(cmdbuf + 3, PSTR("%x %x:%x:%x:%x:%x:%x:%x:%x:%x"), &arg,
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210 &ROM[0], &ROM[1], &ROM[2], &ROM[3],
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211 &ROM[4], &ROM[5], &ROM[6], &ROM[7])) {
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212 break;
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213
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214 case 1:
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215 OWSendCmd(NULL, arg);
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216 sprintf_P(cmdbuf, PSTR("Sent 0x%02x to all ROMS\n\r"), arg);
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217 uart_puts(cmdbuf);
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218 break;
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219
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220 case 9:
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221 OWSendCmd(ROM, arg);
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222 sprintf_P(cmdbuf, PSTR("Sent 0x%02x to ROM %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n\r"),
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223 arg, ROM[0], ROM[1], ROM[2], ROM[3],
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224 ROM[4], ROM[5], ROM[6], ROM[7]);
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225 uart_puts(cmdbuf);
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226
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227 break;
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228
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229 case 0:
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230 default:
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231 uart_putsP(PSTR("Unable to parse wc command\n\r"));
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232 break;
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233 }
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234
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235 OWWriteByte(arg);
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236 sprintf_P(cmdbuf, PSTR("Wrote a 0x%02x\n\r"), arg);
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237 uart_puts(cmdbuf);
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238 } else if (cmdbuf[0] == 't' && cmdbuf[1] == 'e') {
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239 uint8_t crc;
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240 uint16_t temp;
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241 uint8_t buf[9];
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242
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243 if (sscanf_P(cmdbuf + 3, PSTR("%x:%x:%x:%x:%x:%x:%x:%x:%x"),
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244 &ROM[0], &ROM[1], &ROM[2], &ROM[3],
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245 &ROM[4], &ROM[5], &ROM[6], &ROM[7]) != 8) {
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246 uart_putsP(PSTR("Unable to parse ROM ID\n\r"));
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247 continue;
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248 }
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249
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250 if (ROM[0] != OW_FAMILY_TEMP) {
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251 uart_putsP(PSTR("ROM specified isn't a temperature sensor\n\r"));
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252 continue;
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253 }
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254
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255 OWSendCmd(ROM, OW_CONVERTT_CMD);
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256 #if OW_DEBUG
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257 uart_putsP(PSTR("Command sent, waiting\n\r"));
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258 #endif
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259 i = 0;
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260 while (OWReadBit() == 0) {
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261 i++;
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262 }
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263 #if OW_DEBUG
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264 sprintf_P(cmdbuf, PSTR("Temp comversion took %d cycles\n\r"), i);
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265 uart_puts(cmdbuf);
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266 #endif
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267 OWSendCmd(ROM, OW_RD_SCR_CMD);
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268 crc = 0;
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269 for (i = 0; i < 9; i++) {
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270 buf[i] = OWReadByte();
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271 if (i < 8)
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272 OWCRC(buf[i], &crc);
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273 }
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274
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275 temp = buf[0];
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276 temp |= (uint16_t)buf[1] << 8;
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277 temp <<= 3;
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278
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279 if (crc != buf[8]) {
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280 sprintf_P(cmdbuf, PSTR("CRC mismatch got %d vs calcd %d\n\r"), buf[8], crc);
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281 uart_puts(cmdbuf);
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282 continue;
81e2f85e02ce Implement a command driven 1 wire bus tool.
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283 }
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284
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285 sprintf_P(cmdbuf, PSTR("temperature %d.%01d\n\r"),
81e2f85e02ce Implement a command driven 1 wire bus tool.
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286 temp >> 4, (temp << 12) / 6553);
81e2f85e02ce Implement a command driven 1 wire bus tool.
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287 uart_puts(cmdbuf);
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288 } else if (cmdbuf[0] == 's' && cmdbuf[1] == 'r') {
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289 memset(ROM, 0, 8);
0
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290 if (OWTouchReset()) {
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291 uart_putsP(PSTR("No devices on bus\n\r"));
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292 break;
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293 }
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294 if (OWFirst(ROM, 1, 0) == 0) {
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parents:
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295 uart_putsP(PSTR("No module found\n\r"));
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296 break;
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297 }
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298 do {
4
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parents: 0
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299 sprintf_P(cmdbuf, PSTR("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n\r"),
0
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300 ROM[0],
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301 ROM[1],
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302 ROM[2],
ffeab3c04e83 Initial revision
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303 ROM[3],
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304 ROM[4],
ffeab3c04e83 Initial revision
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305 ROM[5],
ffeab3c04e83 Initial revision
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306 ROM[6],
ffeab3c04e83 Initial revision
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parents:
diff changeset
307 ROM[7]);
4
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
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308 uart_puts(cmdbuf);
81e2f85e02ce Implement a command driven 1 wire bus tool.
darius
parents: 0
diff changeset
309 } while (OWNext(ROM, 1, 0));
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
diff changeset
310 #if 0
0
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311
4
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parents: 0
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312 } else if (cmdbuf[0] == 'l' && cmdbuf[1] == 'e' && cmdbuf[2] == 'd') {
0
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313 if (leds == 0) {
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314 leds = 1;
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315 ledpos = 0;
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316 outp(0, TCNT0);
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317 sbi(TIMSK, TOIE0);
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318 sei();
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319 uart_putsP(PSTR("Starting\n\r"));
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parents:
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320 } else {
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321 leds = 0;
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322 ledpos = 0;
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323 PORTA = 0x00;
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parents:
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324 cbi(TIMSK, TOIE0);
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325 cli();
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326 uart_putsP(PSTR("Stopping\n\r"));
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parents:
diff changeset
327 }
4
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
diff changeset
328 #endif
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
diff changeset
329 } else {
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
diff changeset
330 badcmd:
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
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331 uart_putsP(PSTR("Unknown command, ? for a list\n\r"));
0
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parents:
diff changeset
332 }
ffeab3c04e83 Initial revision
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parents:
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333
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parents:
diff changeset
334 }
ffeab3c04e83 Initial revision
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parents:
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335
ffeab3c04e83 Initial revision
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336 return(0);
ffeab3c04e83 Initial revision
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parents:
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337 }
ffeab3c04e83 Initial revision
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parents:
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338
ffeab3c04e83 Initial revision
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parents:
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339 int
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parents:
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340 uart_putc(char c) {
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parents:
diff changeset
341 loop_until_bit_is_set(USR, UDRE);
ffeab3c04e83 Initial revision
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parents:
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342 outp(c, UDR);
ffeab3c04e83 Initial revision
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parents:
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343
ffeab3c04e83 Initial revision
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344 return(0);
ffeab3c04e83 Initial revision
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parents:
diff changeset
345 }
ffeab3c04e83 Initial revision
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parents:
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346
ffeab3c04e83 Initial revision
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parents:
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347 void
ffeab3c04e83 Initial revision
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348 uart_putsP(const char *addr) {
ffeab3c04e83 Initial revision
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parents:
diff changeset
349 char c;
ffeab3c04e83 Initial revision
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parents:
diff changeset
350
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parents:
diff changeset
351 while ((c = PRG_RDB((unsigned short)addr++)))
ffeab3c04e83 Initial revision
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parents:
diff changeset
352 uart_putc(c);
ffeab3c04e83 Initial revision
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parents:
diff changeset
353 }
ffeab3c04e83 Initial revision
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354
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parents:
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355 void
ffeab3c04e83 Initial revision
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parents:
diff changeset
356 uart_puts(const char *addr) {
ffeab3c04e83 Initial revision
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parents:
diff changeset
357 while (*addr)
ffeab3c04e83 Initial revision
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parents:
diff changeset
358 uart_putc(*addr++);
ffeab3c04e83 Initial revision
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parents:
diff changeset
359 }
ffeab3c04e83 Initial revision
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parents:
diff changeset
360
4
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
diff changeset
361 int
0
ffeab3c04e83 Initial revision
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parents:
diff changeset
362 uart_getc(void) {
ffeab3c04e83 Initial revision
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parents:
diff changeset
363 while (!(inp(USR) & 0x80))
ffeab3c04e83 Initial revision
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parents:
diff changeset
364 ;
ffeab3c04e83 Initial revision
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parents:
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365
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parents:
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366 return (inp(UDR));
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parents:
diff changeset
367 }
4
81e2f85e02ce Implement a command driven 1 wire bus tool.
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parents: 0
diff changeset
368