Mercurial > ~darius > hgwebdir.cgi > avr
annotate testavr.c @ 16:026dc24d85e0 AVR_1_3
Spell presence correctly.
author | darius |
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date | Sat, 17 Sep 2005 18:31:19 +0930 |
parents | 0940abdf2b9d |
children | a58b41b7d15c |
rev | line source |
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0 | 1 /* |
9
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
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2 * Test various AVR bits and pieces |
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
|
3 * |
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
|
4 * $Id$ |
7ed10c59ba06
Supply clock speed via the command line so 1wire-delay.h can use it.
darius
parents:
7
diff
changeset
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5 * |
0 | 6 * Copyright (c) 2004 |
7 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. | |
8 * | |
9 * Redistribution and use in source and binary forms, with or without | |
10 * modification, are permitted provided that the following conditions | |
11 * are met: | |
12 * 1. Redistributions of source code must retain the above copyright | |
13 * notice, this list of conditions and the following disclaimer. | |
14 * 2. Redistributions in binary form must reproduce the above copyright | |
15 * notice, this list of conditions and the following disclaimer in the | |
16 * documentation and/or other materials provided with the distribution. | |
17 * | |
18 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
21 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE | |
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
28 * SUCH DAMAGE. | |
29 */ | |
30 | |
31 #include <avr/io.h> | |
32 #include <avr/interrupt.h> | |
33 #include <avr/signal.h> | |
34 #include <avr/pgmspace.h> | |
35 #include <string.h> | |
4 | 36 #include <ctype.h> |
13 | 37 #include <stdlib.h> |
0 | 38 |
39 #include "1wire.h" | |
40 | |
41 #define UART_BAUD_SELECT(baudRate,xtalCpu) ((xtalCpu)/((baudRate)*16l)-1) | |
4 | 42 #define UART_BAUD_RATE 19200 |
0 | 43 |
44 void uart_putsP(const char *addr); | |
45 void uart_puts(const char *addr); | |
46 int uart_putc(char c); | |
4 | 47 int uart_getc(void); |
13 | 48 void uart_puts_dec(uint8_t a, uint8_t l); |
49 void uart_puts_hex(uint8_t a); | |
0 | 50 |
51 int | |
52 main(void) { | |
4 | 53 uint8_t ROM[8]; |
54 char cmdbuf[40]; | |
13 | 55 int8_t i, arg; |
15 | 56 uint8_t crc, buf[9];; |
57 int8_t temp; | |
58 uint16_t tfrac; | |
59 | |
0 | 60 cli(); |
11 | 61 |
62 outp(0xfc, DDRC); | |
0 | 63 outp(0x00, PORTC); |
15 | 64 DDRA = 0xff; |
11 | 65 |
0 | 66 /* Init UART */ |
67 outp(UART_BAUD_SELECT(UART_BAUD_RATE,XTAL_CPU), UBRR); | |
68 | |
69 /* Enable receiver and transmitter. Turn on transmit interrupts */ | |
70 outp(BV(RXEN) | BV(TXEN), UCR); | |
71 | |
4 | 72 uart_putsP(PSTR("\n\r\n\r===============\n\r" |
73 "Inited!\n\r\n\r")); | |
74 | |
75 while (1) { | |
76 uart_putsP(PSTR("> ")); | |
77 i = 0; | |
78 while (1) { | |
79 cmdbuf[i] = tolower(uart_getc()); | |
80 if (cmdbuf[i] == '\n' || cmdbuf[i] == '\r') | |
81 break; | |
82 | |
15 | 83 /* Backspace/Delete */ |
84 if (cmdbuf[i] == 0x08) { | |
4 | 85 if (i > 0) { |
86 uart_putsP(PSTR("\010\040\010")); | |
87 i--; | |
88 } | |
89 continue; | |
90 } | |
0 | 91 |
4 | 92 /* Anything unprintable just ignore it */ |
93 if (!isprint(cmdbuf[i])) | |
94 continue; | |
95 | |
96 uart_putc(cmdbuf[i]); | |
97 i++; | |
98 if (i == sizeof(cmdbuf)) { | |
13 | 99 uart_putsP(PSTR("\n\rLine too long")); |
4 | 100 i = 0; |
13 | 101 break; |
4 | 102 } |
103 } | |
104 cmdbuf[i + 1] = '\0'; | |
105 uart_putsP(PSTR("\n\r")); | |
106 if (i == 0) | |
107 continue; | |
0 | 108 |
4 | 109 if (cmdbuf[0] == '?') { |
110 uart_putsP(PSTR("rs Reset and check for presence\n\r" | |
7 | 111 "sr Search the bus for ROMs\n\r" |
4 | 112 "re Read a bit\n\r" |
113 "rb Read a byte\n\r" | |
114 "wr bit Write a bit\n\r" | |
115 "wb byte Write a byte (hex)\n\r" | |
116 "wc cmd [ROMID] Write command\n\r" | |
15 | 117 "te ROMID Read the temperature from a DS1820\n\r" |
118 "le byte Set the LED port\n\r")); | |
11 | 119 |
4 | 120 continue; |
121 } | |
0 | 122 |
4 | 123 if (i < 2) |
124 goto badcmd; | |
125 | |
126 if (cmdbuf[0] == 'r' && cmdbuf[1] == 's') { | |
127 uart_putsP(PSTR("Resetting... ")); | |
128 | |
129 if (OWTouchReset() == 1) | |
16 | 130 uart_putsP(PSTR("No presence pulse found\n\r")); |
4 | 131 else |
16 | 132 uart_putsP(PSTR("Presence pulse found\n\r")); |
4 | 133 } else if (cmdbuf[0] == 'r' && cmdbuf[1] == 'e') { |
0 | 134 if (OWReadBit()) |
135 uart_putsP(PSTR("Read a 1\n\r")); | |
136 else | |
137 uart_putsP(PSTR("Read a 0\n\r")); | |
4 | 138 } else if (cmdbuf[0] == 'r' && cmdbuf[1] == 'b') { |
13 | 139 uart_putsP(PSTR("Read a 0x")); |
140 uart_puts_hex(OWReadByte()); | |
141 uart_putsP(PSTR("\n\r")); | |
4 | 142 } else if (cmdbuf[0] == 'w' && cmdbuf[1] == 'r') { |
13 | 143 arg = strtol(cmdbuf + 3, (char **)NULL, 10); |
4 | 144 OWWriteBit(arg); |
13 | 145 uart_putsP(PSTR("Wrote a ")); |
146 if (arg) | |
147 uart_putsP(PSTR("1\n\r")); | |
148 else | |
149 uart_putsP(PSTR("0\n\r")); | |
4 | 150 } else if (cmdbuf[0] == 'w' && cmdbuf[1] == 'b') { |
13 | 151 arg = (int)strtol(cmdbuf + 3, (char **)NULL, 16); |
152 OWWriteByte(arg); | |
153 } else if (cmdbuf[0] == 'w' && cmdbuf[1] == 'c') { | |
154 i = strlen(cmdbuf); | |
155 if (i < 5) { | |
156 uart_putsP(PSTR("No arguments\n\r")); | |
4 | 157 continue; |
158 } | |
159 | |
13 | 160 arg = (int)strtol(cmdbuf + 3, (char **)NULL, 16); |
161 if (arg == 0) { | |
162 uart_putsP(PSTR("Unparseable command\n\r")); | |
163 continue; | |
164 } | |
0 | 165 |
13 | 166 if (i == 5) { |
4 | 167 OWSendCmd(NULL, arg); |
13 | 168 continue; |
4 | 169 } |
170 | |
13 | 171 if (i < 29) { |
172 uart_putsP(PSTR("Can't parse ROM ID\n\r")); | |
173 continue; | |
174 } | |
175 for (i = 0; i < 8; i++) | |
176 ROM[i] = (int)strtol(cmdbuf + 6 + (3 * i), (char **)NULL, 16); | |
177 | |
178 OWSendCmd(ROM, arg); | |
4 | 179 } else if (cmdbuf[0] == 't' && cmdbuf[1] == 'e') { |
13 | 180 if (strlen(cmdbuf) < 26) { |
4 | 181 uart_putsP(PSTR("Unable to parse ROM ID\n\r")); |
182 continue; | |
183 } | |
13 | 184 |
185 for (i = 0; i < 8; i++) | |
186 ROM[i] = (int)strtol(cmdbuf + 3 * (i + 1), (char **)NULL, 16); | |
187 | |
4 | 188 if (ROM[0] != OW_FAMILY_TEMP) { |
189 uart_putsP(PSTR("ROM specified isn't a temperature sensor\n\r")); | |
190 continue; | |
191 } | |
192 | |
193 OWSendCmd(ROM, OW_CONVERTT_CMD); | |
194 i = 0; | |
195 while (OWReadBit() == 0) { | |
196 i++; | |
197 } | |
198 OWSendCmd(ROM, OW_RD_SCR_CMD); | |
199 crc = 0; | |
200 for (i = 0; i < 9; i++) { | |
201 buf[i] = OWReadByte(); | |
202 if (i < 8) | |
203 OWCRC(buf[i], &crc); | |
204 } | |
205 | |
206 if (crc != buf[8]) { | |
13 | 207 uart_putsP(PSTR("CRC mismatch\n\r")); |
4 | 208 continue; |
209 } | |
210 | |
13 | 211 #if 0 |
212 uart_putsP(PSTR("temperature ")); | |
213 uart_puts_dec(temp >> 4, 0); | |
214 uart_putsP(PSTR(".")); | |
215 uart_puts_dec((temp << 12) / 6553, 0); | |
216 uart_putsP(PSTR("\n\r")); | |
217 #else | |
218 /* 0 Temperature LSB | |
219 * 1 Temperature MSB | |
220 * 2 Th | |
221 * 3 Tl | |
222 * 4 Reserved | |
223 * 5 Reserved | |
224 * 6 Count Remain | |
225 * 7 Count per C | |
226 * 8 CRC | |
227 */ | |
228 #if 0 | |
229 for (i = 0; i < 9; i++) { | |
230 uart_puts_dec(buf[i], 0); | |
231 uart_putsP(PSTR("\n\r")); | |
232 } | |
233 #endif | |
234 temp = buf[0]; | |
235 if (buf[0] & 0x01) | |
236 temp -= 256; | |
237 temp >>= 1; | |
238 | |
239 tfrac = buf[7] - buf[6]; | |
240 tfrac *= (uint16_t)100; | |
241 tfrac /= buf[7]; | |
242 tfrac += 75; | |
243 if (tfrac < 100) { | |
244 temp--; | |
245 } else { | |
246 tfrac -= 100; | |
247 } | |
248 | |
249 if (temp < 0){ | |
250 uart_putc('-'); | |
251 uart_puts_dec(-temp, 0); | |
252 } else | |
253 uart_puts_dec(temp, 0); | |
254 uart_putsP(PSTR(".")); | |
255 uart_puts_dec(tfrac, 1); | |
256 uart_putsP(PSTR("\n\r")); | |
257 | |
258 #endif | |
4 | 259 } else if (cmdbuf[0] == 's' && cmdbuf[1] == 'r') { |
260 memset(ROM, 0, 8); | |
10 | 261 |
262 i = OWFirst(ROM, 1, 0); | |
0 | 263 do { |
10 | 264 switch (i) { |
265 case OW_BADWIRE: | |
16 | 266 uart_putsP(PSTR("Presence pulse, but no module found, bad module/cabling?\n\r")); |
10 | 267 break; |
268 | |
269 case OW_NOPRESENCE: | |
16 | 270 uart_putsP(PSTR("No presence pulse found\n\r")); |
10 | 271 break; |
272 | |
273 case OW_BADCRC: | |
274 uart_putsP(PSTR("Bad CRC\n\r")); | |
275 break; | |
276 | |
277 case OW_NOMODULES: | |
278 case OW_FOUND: | |
279 break; | |
280 | |
281 default: | |
282 uart_putsP(PSTR("Unknown error from 1 wire library\n\r")); | |
283 break; | |
284 } | |
285 | |
286 if (i != OW_FOUND) | |
287 break; | |
13 | 288 |
289 for (i = 0; i < 7; i++) { | |
290 uart_puts_hex(ROM[i]); | |
291 uart_putc(':'); | |
292 } | |
293 uart_puts_hex(ROM[7]); | |
294 uart_putsP(PSTR("\n\r")); | |
10 | 295 |
296 i = OWNext(ROM, 1, 0); | |
297 } while (1); | |
15 | 298 } else if (cmdbuf[0] == 'l' && cmdbuf[1] == 'e') { |
299 crc = (uint8_t)strtol(cmdbuf + 3, (char **)NULL, 16); | |
300 PORTA = crc; | |
301 #if 1 | |
302 uart_putsP(PSTR("LEDs set to 0x")); | |
303 uart_puts_hex(crc); | |
304 uart_putsP(PSTR("\n\r")); | |
305 #endif | |
4 | 306 } else { |
307 badcmd: | |
308 uart_putsP(PSTR("Unknown command, ? for a list\n\r")); | |
0 | 309 } |
310 | |
311 } | |
312 | |
313 return(0); | |
314 } | |
315 | |
316 int | |
317 uart_putc(char c) { | |
318 loop_until_bit_is_set(USR, UDRE); | |
319 outp(c, UDR); | |
320 | |
321 return(0); | |
322 } | |
323 | |
324 void | |
325 uart_putsP(const char *addr) { | |
326 char c; | |
327 | |
328 while ((c = PRG_RDB((unsigned short)addr++))) | |
329 uart_putc(c); | |
330 } | |
331 | |
332 void | |
333 uart_puts(const char *addr) { | |
334 while (*addr) | |
335 uart_putc(*addr++); | |
336 } | |
337 | |
13 | 338 void |
339 uart_puts_dec(uint8_t a, uint8_t l) { | |
340 char s[4]; | |
341 | |
342 if (l && a < 10) | |
343 uart_putsP(PSTR("0")); | |
344 uart_puts(utoa(a, s, 10)); | |
345 } | |
346 | |
347 void | |
348 uart_puts_hex(uint8_t a) { | |
349 char s[3]; | |
350 | |
351 if (a < 0x10) | |
352 uart_putc('0'); | |
353 | |
354 uart_puts(utoa(a, s, 16)); | |
355 } | |
356 | |
4 | 357 int |
0 | 358 uart_getc(void) { |
359 while (!(inp(USR) & 0x80)) | |
360 ; | |
361 | |
362 return (inp(UDR)); | |
363 } | |
4 | 364 |