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view 1wire-config-avr.h @ 21:01e77066f72b default tip
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author | Daniel O'Connor <darius@dons.net.au> |
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date | Sun, 15 Feb 2015 16:15:23 +1030 |
parents | 3aac1bb54918 |
children |
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/* * Example configuration header for 1-wire bus code. * * This is the user servicable stuff - how to do delays and how to * frob the IO pins. * * Copyright (c) 2009 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Alter these for your configuration * * The configuration described here has the 1-wire read on D3, * a pulldown transistor on D4 and VPP controlled by D5. */ #include <avr/io.h> #include <avr/pgmspace.h> #include <util/delay.h> #include "cons.h" /* Initialise the DDR pins if necessary */ #define OWBUSINIT() do { \ DDRD |= _BV(4); \ DDRD &= ~_BV(3); \ } while (0) /* Set the port up to allow reading from the 1 wire bus */ #define OWSETREAD() \ do { \ } while (0) /* Read the 1-wire bus, non-inverting logic */ #define OWREADBUS() (PIND & _BV(3) ? 1 : 0) /* Set the 1-wire bus to 0 * Turns a transistor on to pull it low */ #define OWSETBUSLOW() PORTD |= _BV(4) /* Set the 1-wire bus to 1 * Turn the transistor off to let the pullup do its job */ #define OWSETBUSHIGH() PORTD &= ~_BV(4) /* Turn Vpp on (ie put +12V on the bus * This is optional, if it is undefined OWProgROM always fails */ #define OWSETVPPON() PORTD |= _BV(5) #define OWSETVPPOFF() PORTD &= ~_BV(5) /* _delay_us can only do a delay of 768/clock_freq */ #if F_CPU > 16000000 #error F_CPU > 16MHz, delays need adjusting #endif #define OWDELAY_A _delay_us(6) /* 6 usec */ #define OWDELAY_B do { _delay_us(48); _delay_us(16); } while (0) /* 64 usec */ #define OWDELAY_C do { _delay_us(48); _delay_us(12); } while (0) /* 60 usec */ #define OWDELAY_D _delay_us(10) /* 10 usec */ #define OWDELAY_E _delay_us(9) /* 9 usec */ #define OWDELAY_F do { _delay_us(55); } while (0) /* 55 usec */ #define OWDELAY_G /* 0 usec */ #define OWDELAY_H do { _delay_us(48); _delay_us(48); _delay_us(48); \ _delay_us(48); _delay_us(48); _delay_us(48); _delay_us(48); \ _delay_us(48);_delay_us(48); _delay_us(48); } while (0) /* 480 usec */ #define OWDELAY_I do { _delay_us(48); _delay_us(22); } while (0) /* 70 usec */ #define OWDELAY_J do { _delay_us(41); _delay_us(41); _delay_us(41); \ _delay_us(41); _delay_us(41); _delay_us(41); _delay_us(41); \ _delay_us(41);_delay_us(41); _delay_us(41); } while (0) /* 410 usec */ #ifdef OW_DEBUG #define OWPUTS(x) puts_P(x) #define OWPUTSP(x) puts_P(x) #define OWPRINTFP(fmt, ...) printf_P(fmt, ## __VA_ARGS__) #else #define OWPUTS(x) #define OWPUTSP(x) #define OWPRINTFP(fmt, ...) #endif