annotate 1wire-config.h @ 12:4e10d1eef9a5

Re-jig programming and add WITH_FUSES= to set fuses automatically if they are specified.
author Daniel O'Connor <darius@dons.net.au>
date Thu, 06 Jan 2011 23:37:15 +1030
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1 /*
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2 * Example configuration header for 1-wire bus code.
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3 *
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4 * This is the user servicable stuff - how to do delays and how to
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5 * frob the IO pins.
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6 *
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7 * Copyright (c) 2009
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8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
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9 *
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10 * Redistribution and use in source and binary forms, with or without
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11 * modification, are permitted provided that the following conditions
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12 * are met:
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13 * 1. Redistributions of source code must retain the above copyright
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14 * notice, this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright
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16 * notice, this list of conditions and the following disclaimer in the
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17 * documentation and/or other materials provided with the distribution.
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18 *
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19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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29 * SUCH DAMAGE.
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30 */
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31
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32 /*
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33 * Alter these for your configuration
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34 *
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35 * The configuration described here has the 1-wire read on D3,
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36 * a pulldown transistor on D4 and VPP controlled by D5.
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37 */
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38 #error You must edit this file to suit your project
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39
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40 /* Initialise the DDR pins if necessary */
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41 #define OWBUSINIT() do { \
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42 DDRD |= _BV(4); \
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43 DDRD &= ~_BV(3); \
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44 } while (0)
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45
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46 /* Set the port up to allow reading from the 1 wire bus */
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47 #define OWSETREAD() \
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48 do { \
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49 } while (0)
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50
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51
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52 /* Read the 1-wire bus, non-inverting logic */
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53 #define OWREADBUS() (PIND & _BV(3) ? 1 : 0)
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54
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55 /* Set the 1-wire bus to 0
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56 * Turns a transistor on to pull it low
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57 */
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58 #define OWSETBUSLOW() PORTD |= _BV(4)
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59
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60 /* Set the 1-wire bus to 1
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61 * Turn the transistor off to let the pullup do its job
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62 */
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63 #define OWSETBUSHIGH() PORTD &= ~_BV(4)
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64
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65 /* Turn Vpp on (ie put +12V on the bus
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66 * This is optional, if it is undefined OWProgROM always fails */
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67 #define OWSETVPPON() PORTD |= _BV(5)
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68 #define OWSETVPPOFF() PORTD &= ~_BV(5)
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69
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70 /* _delay_us can only do a delay of 768/clock_freq */
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71 #if F_CPU > 16000000
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72 #error F_CPU > 16MHz, delays need adjusting
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73 #endif
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74
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75 #define OWDELAY_A _delay_us(6) /* 6 usec */
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76 #define OWDELAY_B do { _delay_us(48); _delay_us(16); } while (0) /* 64 usec */
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77 #define OWDELAY_C do { _delay_us(48); _delay_us(12); } while (0) /* 60 usec */
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78 #define OWDELAY_D _delay_us(10) /* 10 usec */
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79 #define OWDELAY_E _delay_us(9) /* 9 usec */
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80 #define OWDELAY_F do { _delay_us(55); } while (0) /* 55 usec */
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81 #define OWDELAY_G /* 0 usec */
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82 #define OWDELAY_H do { _delay_us(48); _delay_us(48); _delay_us(48); \
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83 _delay_us(48); _delay_us(48); _delay_us(48); _delay_us(48); \
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84 _delay_us(48);_delay_us(48); _delay_us(48); } while (0) /* 480 usec */
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85 #define OWDELAY_I do { _delay_us(48); _delay_us(22); } while (0) /* 70 usec */
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86
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87 #ifdef OW_DEBUG
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88 #define OWPUTS(x) puts_P(x)
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89 #define OWPUTSP(x) puts_P(x)
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90 #define OWPRINTFP(fmt, ...) printf_P(fmt, ## __VA_ARGS__)
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91 #else
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92 #define OWPUTS(x)
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93 #define OWPUTSP(x)
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94 #define OWPRINTFP(fmt, ...)
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95 #endif