Mercurial > ~darius > hgwebdir.cgi > avr-lib
annotate ds1307.c @ 4:095216e8453d
Hide register name abstraction in a separate file.
| author | darius@Inchoate |
|---|---|
| date | Thu, 12 Mar 2009 16:30:47 +1030 |
| parents | 15d89caaf516 |
| children | 3da232f97e81 |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 2 * Interface to a DS1307 | |
| 3 * | |
| 4 * Copyright (c) 2008 | |
| 5 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. | |
| 6 * | |
| 7 * Redistribution and use in source and binary forms, with or without | |
| 8 * modification, are permitted provided that the following conditions | |
| 9 * are met: | |
| 10 * 1. Redistributions of source code must retain the above copyright | |
| 11 * notice, this list of conditions and the following disclaimer. | |
| 12 * 2. Redistributions in binary form must reproduce the above copyright | |
| 13 * notice, this list of conditions and the following disclaimer in the | |
| 14 * documentation and/or other materials provided with the distribution. | |
| 15 * | |
| 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
| 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE | |
| 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
| 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
| 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
| 26 * SUCH DAMAGE. | |
| 27 */ | |
| 28 | |
| 29 #include <stdio.h> | |
| 30 #include <stdlib.h> | |
| 31 #include <inttypes.h> | |
| 32 #include <avr/io.h> | |
| 33 #include <avr/pgmspace.h> | |
| 34 #include <util/twi.h> | |
| 35 #include <util/delay.h> | |
| 36 | |
| 37 #include "ds1307.h" | |
| 38 | |
| 39 // #define TWDEBUG | |
| 40 | |
| 41 /* | |
| 42 * ds1307_init | |
| 43 * | |
| 44 * Setup TWI interface | |
| 45 * | |
| 46 */ | |
| 47 int | |
| 48 ds1307_init(void) { | |
|
3
15d89caaf516
Add support for single UART devices, although untested apart from a compile.
darius@Inchoate
parents:
0
diff
changeset
|
49 #ifdef PRR |
| 0 | 50 PRR &= _BV(PRTWI); /* Power TWI on - note that the |
| 51 * datasheet says this is already 0 at | |
| 52 * power on.. */ | |
|
3
15d89caaf516
Add support for single UART devices, although untested apart from a compile.
darius@Inchoate
parents:
0
diff
changeset
|
53 #endif |
| 0 | 54 TWSR = 0; /* TWI Prescaler = 1 */ |
| 55 #if F_CPU < 3600000UL | |
| 56 TWBR = 10; /* Smallest valid TWBR */ | |
| 57 #else | |
| 58 TWBR = (F_CPU / 100000UL - 16) / 2; | |
| 59 #endif | |
| 60 | |
| 61 TWCR = _BV(TWEN); | |
| 62 | |
| 63 return(0); | |
| 64 } | |
| 65 | |
| 66 /* | |
| 67 * iic_read | |
| 68 * | |
| 69 * Read len bytes of data from address adr in slave sla into | |
| 70 * data. Presume that the slave auto-increments the address on | |
| 71 * successive reads. | |
| 72 * | |
| 73 * Returns the number of bytes read, or the following on failure. | |
| 74 * IIC_STFAIL Could generate START condition (broken bus or busy). | |
| 75 * IIC_FAILARB Failed bus arbitration. | |
| 76 * IIC_SLNAK Slave NAK'd. | |
| 77 * IIC_NOREPLY No reply (no such slave?) | |
| 78 * IIC_UNKNOWN Unexpected return from TWI reg. | |
| 79 * | |
| 80 * Heaviy cribbed from twitest.c by Joerg Wunsch | |
| 81 */ | |
| 82 int8_t | |
| 83 iic_read(uint8_t *data, uint8_t len, uint8_t adr, uint8_t sla) { | |
| 84 uint8_t twst, twcr, cnt; | |
| 85 | |
| 86 /* Generate START */ | |
| 87 TWCR = _BV(TWINT) | _BV(TWSTA) | _BV(TWEN); | |
| 88 | |
| 89 /* Spin waiting for START to be generated */ | |
| 90 while ((TWCR & _BV(TWINT)) == 0) | |
| 91 ; | |
| 92 switch (twst = TW_STATUS) { | |
| 93 case TW_REP_START: /* OK but shouldn't happen */ | |
| 94 case TW_START: | |
| 95 break; | |
| 96 | |
| 97 case TW_MT_ARB_LOST: | |
| 98 return IIC_FAILARB; | |
| 99 break; | |
| 100 | |
| 101 default: | |
| 102 /* Not in start condition, bail */ | |
| 103 return IIC_UNKNOWN; | |
| 104 } | |
| 105 #ifdef TWDEBUG | |
| 106 printf_P(PSTR("Sent START\r\n")); | |
| 107 #endif | |
| 108 /* Send SLA+W */ | |
| 109 TWDR = sla | TW_WRITE; | |
| 110 TWCR = _BV(TWINT) | _BV(TWEN); | |
| 111 | |
| 112 /* Spin waiting for a response to be generated */ | |
| 113 while ((TWCR & _BV(TWINT)) == 0) | |
| 114 ; | |
| 115 | |
| 116 #ifdef TWDEBUG | |
| 117 printf_P(PSTR("Sent SLA+W\r\n")); | |
| 118 #endif | |
| 119 switch (twst = TW_STATUS) { | |
| 120 case TW_MT_SLA_ACK: | |
| 121 break; | |
| 122 | |
| 123 case TW_MT_SLA_NACK: | |
| 124 /* Send STOP */ | |
| 125 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 126 return IIC_SLNAK; | |
| 127 | |
| 128 case TW_MT_ARB_LOST: | |
| 129 return IIC_FAILARB; | |
| 130 break; | |
| 131 | |
| 132 default: | |
| 133 /* Send STOP */ | |
| 134 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 135 return IIC_UNKNOWN; | |
| 136 } | |
| 137 /* Send address */ | |
| 138 TWDR = adr; | |
| 139 TWCR = _BV(TWINT) | _BV(TWEN); | |
| 140 | |
| 141 /* Spin waiting for a response to be generated */ | |
| 142 while ((TWCR & _BV(TWINT)) == 0) | |
| 143 ; | |
| 144 #ifdef TWDEBUG | |
| 145 printf_P(PSTR("Sent address\r\n")); | |
| 146 #endif | |
| 147 switch ((twst = TW_STATUS)) { | |
| 148 case TW_MT_DATA_ACK: | |
| 149 break; | |
| 150 | |
| 151 case TW_MT_DATA_NACK: | |
| 152 /* Send STOP */ | |
| 153 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 154 return IIC_SLNAK; | |
| 155 | |
| 156 case TW_MT_ARB_LOST: | |
| 157 return IIC_FAILARB; | |
| 158 | |
| 159 default: | |
| 160 /* Send STOP */ | |
| 161 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 162 return IIC_UNKNOWN; | |
| 163 } | |
| 164 | |
| 165 /* Master receive cycle */ | |
| 166 TWCR = _BV(TWINT) | _BV(TWSTA) | _BV(TWEN); | |
| 167 while ((TWCR & _BV(TWINT)) == 0) /* wait for transmission */ | |
| 168 ; | |
| 169 | |
| 170 #ifdef TWDEBUG | |
| 171 printf_P(PSTR("Sent START\r\n")); | |
| 172 #endif | |
| 173 switch ((twst = TW_STATUS)) { | |
| 174 case TW_REP_START: /* OK but shouldn't happen */ | |
| 175 case TW_START: | |
| 176 break; | |
| 177 | |
| 178 case TW_MT_ARB_LOST: | |
| 179 return IIC_FAILARB; | |
| 180 | |
| 181 default: | |
| 182 /* Send STOP */ | |
| 183 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 184 return IIC_UNKNOWN; | |
| 185 } | |
| 186 | |
| 187 /* send SLA+R */ | |
| 188 TWDR = sla | TW_READ; | |
| 189 TWCR = _BV(TWINT) | _BV(TWEN); /* clear interrupt to start transmission */ | |
| 190 | |
| 191 /* Spin waiting for a response to be generated */ | |
| 192 while ((TWCR & _BV(TWINT)) == 0) | |
| 193 ; | |
| 194 #ifdef TWDEBUG | |
| 195 printf_P(PSTR("Sent SLA+R\r\n")); | |
| 196 #endif | |
| 197 switch ((twst = TW_STATUS)) { | |
| 198 case TW_MR_SLA_ACK: | |
| 199 break; | |
| 200 | |
| 201 case TW_MR_SLA_NACK: | |
| 202 /* Send STOP */ | |
| 203 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 204 return IIC_SLNAK; | |
| 205 | |
| 206 case TW_MR_ARB_LOST: | |
| 207 return IIC_FAILARB; | |
| 208 | |
| 209 default: | |
| 210 /* Send STOP */ | |
| 211 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 212 return IIC_UNKNOWN; | |
| 213 } | |
| 214 | |
| 215 cnt = 0; | |
| 216 for (twcr = _BV(TWINT) | _BV(TWEN) | _BV(TWEA); | |
| 217 len > 0; len--) { | |
| 218 /* Send NAK on last byte */ | |
| 219 if (len == 1) | |
| 220 twcr = _BV(TWINT) | _BV(TWEN); | |
| 221 TWCR = twcr; /* clear int to start transmission */ | |
| 222 /* Spin waiting for a response to be generated */ | |
| 223 while ((TWCR & _BV(TWINT)) == 0) | |
| 224 ; | |
| 225 #ifdef TWDEBUG | |
| 226 printf_P(PSTR("Data request done\r\n")); | |
| 227 #endif | |
| 228 switch ((twst = TW_STATUS)) { | |
| 229 case TW_MR_DATA_NACK: | |
| 230 /* Send STOP */ | |
| 231 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 232 //printf_P(PSTR("NACK on byte %d\r\n"), cnt); | |
| 233 return cnt; | |
| 234 | |
| 235 case TW_MR_DATA_ACK: | |
| 236 *data++ = TWDR; | |
| 237 //printf_P(PSTR("ACK on byte %d for 0x%02x\r\n"), cnt, *(data - 1)); | |
| 238 cnt++; | |
| 239 break; | |
| 240 | |
| 241 default: | |
| 242 return IIC_UNKNOWN; | |
| 243 } | |
| 244 } | |
| 245 | |
| 246 /* Send STOP */ | |
| 247 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 248 return cnt; | |
| 249 } | |
| 250 | |
| 251 /* | |
| 252 * iic_write | |
| 253 * | |
| 254 * Write len bytes of data from address adr in slave sla into | |
| 255 * data. Presume that the slave auto-increments the address on | |
| 256 * successive writes. | |
| 257 * | |
| 258 * Returns the number of bytes read, or the following on failure. | |
| 259 * IIC_STFAIL Could generate START condition (broken bus or busy). | |
| 260 * IIC_FAILARB Failed bus arbitration. | |
| 261 * IIC_SLNAK Slave NAK'd. | |
| 262 * IIC_NOREPLY No reply (no such slave?) | |
| 263 * IIC_UNKNOWN Unexpected return from TWI reg. | |
| 264 * | |
| 265 * Heaviy cribbed from twitest.c by Joerg Wunsch | |
| 266 */ | |
| 267 int8_t | |
| 268 iic_write(uint8_t *data, uint8_t len, uint8_t adr, uint8_t sla) { | |
| 269 uint8_t twst, cnt; | |
| 270 | |
| 271 /* Generate START */ | |
| 272 TWCR = _BV(TWINT) | _BV(TWSTA) | _BV(TWEN); | |
| 273 | |
| 274 /* Spin waiting for START to be generated */ | |
| 275 while ((TWCR & _BV(TWINT)) == 0) | |
| 276 ; | |
| 277 switch (twst = TW_STATUS) { | |
| 278 case TW_REP_START: /* OK but shouldn't happen */ | |
| 279 case TW_START: | |
| 280 break; | |
| 281 | |
| 282 case TW_MT_ARB_LOST: | |
| 283 return IIC_FAILARB; | |
| 284 break; | |
| 285 | |
| 286 default: | |
| 287 /* Not in start condition, bail */ | |
| 288 return IIC_UNKNOWN; | |
| 289 } | |
| 290 #ifdef TWDEBUG | |
| 291 printf_P(PSTR("Sent START\r\n")); | |
| 292 #endif | |
| 293 | |
| 294 /* Send SLA+W */ | |
| 295 TWDR = sla | TW_WRITE; | |
| 296 TWCR = _BV(TWINT) | _BV(TWEN); | |
| 297 | |
| 298 /* Spin waiting for a response to be generated */ | |
| 299 while ((TWCR & _BV(TWINT)) == 0) | |
| 300 ; | |
| 301 | |
| 302 #ifdef TWDEBUG | |
| 303 printf_P(PSTR("Sent SLA+W\r\n")); | |
| 304 #endif | |
| 305 switch (twst = TW_STATUS) { | |
| 306 case TW_MT_SLA_ACK: | |
| 307 break; | |
| 308 | |
| 309 case TW_MT_SLA_NACK: | |
| 310 /* Send STOP */ | |
| 311 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 312 return IIC_SLNAK; | |
| 313 | |
| 314 case TW_MT_ARB_LOST: | |
| 315 return IIC_FAILARB; | |
| 316 break; | |
| 317 | |
| 318 default: | |
| 319 /* Send STOP */ | |
| 320 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 321 return IIC_UNKNOWN; | |
| 322 } | |
| 323 /* Send address */ | |
| 324 TWDR = adr; | |
| 325 TWCR = _BV(TWINT) | _BV(TWEN); | |
| 326 | |
| 327 /* Spin waiting for a response to be generated */ | |
| 328 while ((TWCR & _BV(TWINT)) == 0) | |
| 329 ; | |
| 330 #ifdef TWDEBUG | |
| 331 printf_P(PSTR("Sent address\r\n")); | |
| 332 #endif | |
| 333 switch ((twst = TW_STATUS)) { | |
| 334 case TW_MT_DATA_ACK: | |
| 335 break; | |
| 336 | |
| 337 case TW_MT_DATA_NACK: | |
| 338 /* Send STOP */ | |
| 339 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 340 return IIC_SLNAK; | |
| 341 | |
| 342 case TW_MT_ARB_LOST: | |
| 343 return IIC_FAILARB; | |
| 344 | |
| 345 default: | |
| 346 /* Send STOP */ | |
| 347 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 348 return IIC_UNKNOWN; | |
| 349 } | |
| 350 | |
| 351 cnt = 0; | |
| 352 for (; len > 0; len--) { | |
| 353 TWDR = *data++; | |
| 354 TWCR = _BV(TWINT) | _BV(TWEN); | |
| 355 | |
| 356 /* Spin waiting for a response to be generated */ | |
| 357 while ((TWCR & _BV(TWINT)) == 0) | |
| 358 ; | |
| 359 #ifdef TWDEBUG | |
| 360 printf_P(PSTR("Data sent\r\n")); | |
| 361 #endif | |
| 362 switch ((twst = TW_STATUS)) { | |
| 363 case TW_MT_DATA_NACK: | |
| 364 /* Send STOP */ | |
| 365 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 366 return cnt; | |
| 367 | |
| 368 case TW_MT_DATA_ACK: | |
| 369 cnt++; | |
| 370 break; | |
| 371 | |
| 372 default: | |
| 373 return IIC_UNKNOWN; | |
| 374 } | |
| 375 } | |
| 376 | |
| 377 /* Send STOP */ | |
| 378 TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN); | |
| 379 return cnt; | |
| 380 } | |
| 381 | |
| 382 /* | |
| 383 * ds1307_gettod | |
| 384 * | |
| 385 * Read time of day from DS1307 into time | |
| 386 * | |
| 387 * Note that we canonify to 24hr mode. | |
| 388 * | |
| 389 */ | |
| 390 int8_t | |
| 391 ds1307_gettod(ds1307raw_t *time) { | |
| 392 int8_t len; | |
| 393 | |
| 394 len = iic_read((uint8_t *)time, sizeof(ds1307raw_t) + 1, 0, DS1307_ADR); | |
| 395 if (len < 0) { | |
| 396 printf_P(PSTR("iic_read failed - %d\r\n"), len); | |
| 397 return(0); | |
| 398 } | |
| 399 | |
| 400 #if 1 | |
| 401 if (len != sizeof(ds1307raw_t)) { | |
| 402 printf_P(PSTR("Only got %d bytes (vs %d)\r\n"), len, sizeof(ds1307raw_t)); | |
| 403 return(0); | |
| 404 } | |
| 405 #endif | |
| 406 | |
| 407 #ifdef TWDEBUG | |
| 408 int i; | |
| 409 | |
| 410 for (i = 0; i < len; i++) | |
| 411 printf_P(PSTR("0x%02x: 0x%02x\r\n"), i, *(((uint8_t *)time) + i)); | |
| 412 #endif | |
| 413 | |
| 414 return(1); | |
| 415 } | |
| 416 | |
| 417 /* | |
| 418 * ds1307_settod | |
| 419 * | |
| 420 * Set the DS1307 with the supplied time, format like so | |
| 421 * sc 2008/10/29 23:45:30 | |
| 422 * | |
| 423 */ | |
| 424 int8_t | |
| 425 ds1307_settod(char *date) { | |
| 426 ds1307raw_t rtime; | |
| 427 uint16_t year; | |
| 428 uint8_t i, month, day, hour, min, sec; | |
| 429 | |
| 430 if ((i = sscanf_P(date, PSTR("%hu/%hhd/%hhd %hhd:%hhd:%hhd"), &year, &month, &day, &hour, &min, &sec)) != 6) { | |
| 431 printf_P(PSTR("Can't parse date\r\n")); | |
| 432 return(0); | |
| 433 } | |
| 434 | |
| 435 if (year > 1900) | |
| 436 year -= 1900; | |
| 437 | |
| 438 rtime.split.year10 = year / 10; | |
| 439 rtime.split.year = year % 10; | |
| 440 rtime.split.month10 = month / 10; | |
| 441 rtime.split.month = month % 10; | |
| 442 rtime.split.day10 = day / 10; | |
| 443 rtime.split.day = day % 10; | |
| 444 rtime.split.pmam = ((hour / 10) & 0x02) >> 1; | |
| 445 rtime.split.hour10 = (hour / 10) & 0x01; | |
| 446 rtime.split.hour = hour % 10; | |
| 447 rtime.split.min10 = min / 10; | |
| 448 rtime.split.min = min % 10; | |
| 449 rtime.split.sec10 = sec / 10; | |
| 450 rtime.split.sec = sec % 10; | |
| 451 | |
| 452 rtime.split.ch = 0; // Enable clock | |
| 453 rtime.split.s1224 = 0; // 24 hour mode | |
| 454 rtime.split.dow = 0; // XXX: unused | |
| 455 rtime.split.out = 0; // No clock out | |
| 456 | |
| 457 #ifdef TWDEBUG | |
| 458 for (i = 0; i < sizeof(ds1307raw_t); i++) | |
| 459 printf_P(PSTR("0x%02x: 0x%02x\r\n"), i, *(((uint8_t *)&rtime) + i)); | |
| 460 #endif | |
| 461 if ((i = iic_write((uint8_t *)&rtime, sizeof(ds1307raw_t), 0, DS1307_ADR)) != sizeof(ds1307raw_t)) | |
| 462 printf_P(PSTR("Can't write to RTC, sent %d (vs %d)\r\n"), i, sizeof(ds1307raw_t)); | |
| 463 | |
| 464 return(1); | |
| 465 } | |
| 466 | |
| 467 /* | |
| 468 * ds1307_printtime | |
| 469 * | |
| 470 * Print the time in rtime with trailer | |
| 471 * | |
| 472 */ | |
| 473 void | |
| 474 ds1307_printtime(char *leader, char *trailer) { | |
| 475 ds1307raw_t rtime; | |
| 476 uint8_t hour; | |
| 477 | |
| 478 if (ds1307_gettod(&rtime) != 1) | |
| 479 return; | |
| 480 | |
| 481 // Handle 12/24 hour time | |
| 482 hour = rtime.split.hour10 * 10 + rtime.split.hour; | |
| 483 if (rtime.split.s1224) { | |
| 484 if (rtime.split.pmam) | |
| 485 hour += 12; | |
| 486 } else | |
| 487 hour += (rtime.split.pmam << 1) * 10; | |
| 488 | |
| 489 printf_P(PSTR("%S%04d/%02d/%02d %02d:%02d:%02d%S"), leader, | |
| 490 1900 + rtime.split.year10 * 10 + rtime.split.year, | |
| 491 rtime.split.month10 * 10 + rtime.split.month, | |
| 492 rtime.split.day10 * 10 + rtime.split.day, | |
| 493 hour, | |
| 494 rtime.split.min10 * 10 + rtime.split.min, | |
| 495 rtime.split.sec10 * 10 + rtime.split.sec, | |
| 496 trailer); | |
| 497 } |